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IDT72230 Datasheet(PDF) 8 Page - Integrated Device Technology

Part # IDT72230
Description  CMOS SyncFIFO
Download  11 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT72230 Datasheet(HTML) 8 Page - Integrated Device Technology

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8
COMMERCIALTEMPERATURERANGE
IDT72420/72200/72210/72220/72230/72240 CMOS SYNCFIFO™
64 x 8, 256 x 8, 512 x 8, 1,024 x 8, 2,048 x 8, 4,096 x 8
FEBRUARY 10, 2006
Figure 6. Full Flag Timing
NOTE:
1.
When tSKEW1
≥ minimum specification, tFRL maximum = tCLK + tSKEW1
When tSKEW1 < minimum specification, tFRL maximum = 2tCLK + tSKEW1 or tCLK + tSKEW1
The Latency Timing apply only at the Empty Boundary (
EF = LOW).
Figure 7. Empty Flag Timing
WCLK
D0 - D7
WEN
RCLK
FF
tSKEW1
tWFF
DATA WRITE
REN
tENH
tDS
tSKEW1
tENS
NO WRITE
NO WRITE
tA
LOW
OE
tENS
tWFF
tENS
Q0 - Q7
tENH
tA
tENS
tWFF
NEXT DATA READ
DATA READ
DATA IN OUTPUT REGISTER
2680 drw 08
NO WRITE
WCLK
D0 - D7
WEN
RCLK
EF
Q0 - Q7
OE
tDS
tENS
tREF
tA
DATA WRITE 1
tENH
tREF
tDS
tENS
DATA WRITE 2
REN
DATA IN OUTPUT REGISTER
tFRL
(1)
LOW
tSKEW1
tSKEW1
tFRL
(1)
tREF
DATA READ
2680 drw 09
tENH


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