CY7C1481V25
CY7C1483V25
CY7C1487V25
Document #: 38-05281 Rev. *H
Page 8 of 30
VDD
Power Supply
Power supply inputs to the core of the device.
VDDQ
I/O Power
Supply
Power supply for the I/O circuitry.
VSS
Ground
Ground for the core of the device.
VSSQ[2]
I/O Ground
Ground for the I/O circuitry.
MODE
Input-Static
Selects Burst Order. When tied to GND selects linear burst sequence. When tied to
VDD or left floating selects interleaved burst sequence. This is a strap pin and should
remain static during device operation. Mode Pin has an internal pull up.
TDO
JTAG Serial
Output
Synchronous
Serial data-out to the JTAG circuit. Delivers data on the negative edge of TCK. If
the JTAG feature is not used, this pin should be left unconnected. This pin is not
available on TQFP packages.
TDI
JTAG Serial
Input
Synchronous
Serial data-in to the JTAG circuit. Sampled on the rising edge of TCK. If the JTAG
feature is not used, this pin can be left floating or connected to VDD through a pull up
resistor. This pin is not available on TQFP packages.
TMS
JTAG Serial
Input
Synchronous
Serial data-in to the JTAG circuit. Sampled on the rising edge of TCK. If the JTAG
feature is not used, this pin can be disconnected or connected to VDD. This pin is not
available on TQFP packages.
TCK
JTAG Clock
Clock input to the JTAG circuitry. If the JTAG feature is not used, this pin must be
connected to VSS. This pin is not available on TQFP packages.
NC
-
No Connects. Not internally connected to the die. 144M, 288M, 576M, and 1G are
address expansion pins are not internally connected to the die.
Pin Definitions (continued)
Pin Name
I/O
Description
Note
2. Applicable for TQFP package. For BGA package VSS serves as ground for the core and the IO circuitry.
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