CY7C1444AV33-200AXC datasheet(2/26 Pages) CYPRESS

Part #	CY7C1444AV33-200AXC

Description	36-Mbit (1M x 36/2Mx 18) Pipelined DCD Sync SRAM

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Manufacturer	CYPRESS [Cypress Semiconductor]

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CY7C1444AV33

CY7C1445AV33

Document #: 38-05352 Rev. *E

Page 8 of 27

1

2

ADDRESS

REGISTER

ADV

CLK

BURST

COUNTER AND

LOGIC

CLR

Q1

Q0

ADSP

ADSC

MODE

BWD

BWC

BWB

BWA

BWE

GW

CE1

CE2

CE3

OE

DQD,DQPD

BYTE

WRITE REGISTER

DQc,DQPC

BYTE

WRITE REGISTER

DQB,DQPB

BYTE

WRITE REGISTER

DQA,DQPA

BYTE

WRITE REGISTER

ENABLE

REGISTER

PIPELINED

ENABLE

OUTPUT

REGISTERS

SENSE

AMPS

MEMORY

ARRAY

OUTPUT

BUFFERS

DQA,DQPA

BYTE

WRITE DRIVER

DQB,DQPB

BYTE

WRITE DRIVER

DQc,DQPC

BYTE

WRITE DRIVER

DQD,DQPD

BYTE

WRITE DRIVER

INPUT

REGISTERS

A0,A1,A

A[1:0]

SLEEP

CONTROL

ZZ

E

2

DQs

DQPA

DQPB

DQPC

DQPD

Logic Block Diagram – CY7C1444AV33 (1M x 36)

ADDRESS

REGISTER

ADV

CLK

BURST

COUNTER AND

LOGIC

CLR

Q1

Q0

ADSC

BWB

BWA

CE1

DQB, DQPB

BYTE

WRITE REGISTER

DQA , DQPA

BYTE

WRITE REGISTER

ENABLE

REGISTER

OE

SENSE

AMPS

MEMORY

ARRAY

ADSP

2

A[1:0]

MODE

CE2

CE3

GW

BWE

PIPELINED

ENABLE

DQs,

DQPA

DQPB

OUTPUT

REGISTERS

INPUT

REGISTERS

E

OUTPUT

BUFFERS

DQB , DQPB

BYTE

WRITE DRIVER

DQA, DQPA

BYTE

WRITE DRIVER

SLEEP

CONTROL

ZZ

A0, A1, A

Logic Block Diagram – CY7C1445AV33 (2M x 18)

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