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IDT7130SA100JGI Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT7130SA100JGI Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 19 page IDT7130SA/LA and IDT7140SA/LA High-Speed 1K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges 2 Description The IDT7130/IDT7140 are high-speed 1K x 8 Dual-Port Static RAMs. The IDT7130 is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the IDT7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-or- more-bit memory system applications results in full-speed, error- free operation without the need for additional discrete logic. Both devices provide two independent ports with separate con- trol, address, and I/O pins that permit independent asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance tech-nology, these devices typically operate on only 550mW of power. Low- power (LA) versions offer battery backup data retention capability, with each Dual-Port typically consuming 200µW from a 2V battery. The IDT7130/IDT7140 devices are packaged in 48-pin sidebraze or plastic DIPs, LCCs, flatpacks, 52-pin PLCC, and 64-pin TQFP and STQFP. Military grade products are manufactured in compli- ance with the latest revision of MIL-PRF-38535 QML, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Pin Configurations(1,2,3) NOTES: 1. All VCC pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. P48-1 package body is approximately .55 in x .61 in x .19 in. C48-2 package body is approximately .62 in x 2.43 in x .15 in. L48-1 package body is approximately .57 in x .57 in x .68 in. F48-1 package body is approximately .75 in x .75 in x .11 in. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 148 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 IDT7130/40 Por C P48-1(4) & C48-2(4) 48-Pin DIP Top View(5) 2689 drw 02 GND I/O6R I/O5R I/O4R I/O3R I/O2R I/O1R I/O0R I/O7L I/O6L I/O5L I/O4L CER CEL OEL A0L INTL BUSYL R/ WL R/ WR BUSYR INTR VCC OER A0R A1R A2R A3R A4R A5R A6R A7R A8R A9R I/O7R I/O3L A1L A2L A3L A4L A5L A6L A7L A8L A9L I/O0L I/O1L I/O2L , 01/08/02 IN 01/ |
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