CY14B104L/CY14B104N
PRELIMINARY
Document #: 001-07102 Rev. *E
Page 6 of 21
Preventing AutoStore
The AutoStore function can be disabled by initiating an
AutoStore disable sequence. A sequence of read operations
is performed in a manner similar to the software STORE
initiation. To initiate the AutoStore disable sequence, the
following sequence of CE controlled read operations must be
performed:
1. Read address 0x4E38 Valid READ
2. Read address 0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x8B45 AutoStore Disable
The AutoStore can be re-enabled by initiating an AutoStore
enable sequence. A sequence of read operations is performed
in a manner similar to the software RECALL initiation. To
initiate the AutoStore enable sequence, the following
sequence of CE controlled read operations must be
performed:
1. Read address 0x4E38 Valid READ
2. Read address 0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x4B46 AutoStore Enable
If the AutoStore function is disabled or re-enabled a manual
STORE operation (hardware or software) must be issued to
save the AutoStore state through subsequent power down
cycles. The part comes from the factory with AutoStore
enabled.
Table 1. Mode Selection
CE
WE
OE
A15 - A0
Mode
IO
Power
H
X
X
X
Not Selected
Output High Z
Standby
L
H
L
X
Read SRAM
Output Data
Active
L
L
X
X
Write SRAM
Input Data
Active
L
H
L
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x8B45
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Autostore
Disable
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Active
L
H
L
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4B46
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Autostore
Enable
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Active
[2,3,4]
L
H
L
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x8FC0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
Store
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active
ICC2
[2,3,4]
L
H
L
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4C63
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
Recall
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active
[2,3,4]
Notes
2. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.
3. While there are 19 address lines on the CY14B104L/CY14B104N, only the lower 16 lines are used to control software modes.
4. IO state depends on the state of OE. The IO table shown assumes OE LOW.
[2,3,4]
[+] Feedback
[+] Feedback
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
