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CY62127DV30LL-55ZXI Datasheet(PDF) 2 Page - Cypress Semiconductor

Part # CY62127DV30LL-55ZXI
Description  1-Mb (64K x 16) Static RAM
Download  11 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY62127DV30LL-55ZXI Datasheet(HTML) 2 Page - Cypress Semiconductor

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CY62127DV30
Document #: 38-05229 Rev. *H
Page 2 of 11
Product Portfolio
Pin Configurations[2, 3]
Notes:
2. NC pins are not connected to the die.
3. Pin #23 of TSOP II and E3 ball of FBGA are DNU, which have to be left floating or tied to Vss to ensure proper application. (Expansion Pins on FBGA Package:
E4 - 2M, D3 - 4M, H1 - 8M, G2 - 16M, H6 - 32M).
4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25°C.
Product
VCC Range (V)
Speed
(ns)
Power Dissipation
Operating, ICC (mA)
Standby ISB2 (µA)
f = 1 MHz
f = fMAX
Min.
Typ.
Max.
Typ[4]
Max.
Typ.[4]
Max.
Range
Typ.[4]
Max.
CY62127DV30L
2.2
3.0
3.6
45
0.85
1.5
6.5
13
Ind’l
1.5
5
CY62127DV30LL
45
0.85
1.5
6.5
13
Ind’l
1.5
4
CY62127DV30L
2.2
3.0
3.6
55
0.85
1.5
5
10
Ind’l
1.5
5
Auto
1.5
15
CY62127DV30LL
2.2
3.0
3.6
55
0.85
1.5
5
10
Ind’l
1.5
4
CY62127DV30L
2.2
3.0
3.6
70
0.85
1.5
5
10
Ind’l
1.5
5
CY62127DV30LL
70
0.85
1.5
5
10
Ind’l
1.5
4
WE
1
2
3
4
5
6
7
8
9
10
11
14
31
32
36
35
34
33
37
40
39
38
Top View
TSOP II (Forward)
12
13
41
44
43
42
16
15
29
30
VCC
A15
A14
A13
A12
NC
A4
A3
OE
VSS
A5
I/O15
A2
CE
I/O2
I/O0
I/O1
BHE
NC
A1
A0
18
17
20
19
I/O3
27
28
25
26
22
21
23
24
DNU
VSS
I/O6
I/O4
I/O5
I/O7
A6
A7
BLE
VCC
I/O14
I/O13
I/O12
I/O11
I/O10
I/O9
I/O8
A8
A9
A10
A11
WE
A11
A10
A6
A0
A3
CE
I/O10
I/O8
I/O9
A4
A5
I/O11
I/O13
I/O12
I/O14
I/O15
VSS
A9
A8
OE
VSS
A7
I/O0
BHE
NC
A2
A1
BLE
VCC
I/O2
I/O1
I/O3
I/O4
I/O5
I/O6
I/O7
A15
A14
A13
A
12
NC
NC
NC
3
2
6
5
4
1
D
E
B
A
C
F
G
H
FBGA (Top View)
NC
DNU
VCC
NC
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