CY62136FV30 datasheet(7/12 Pages) CYPRESS

Part #	CY62136FV30

Description	2-Mbit (128K x 16) Static RAM

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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CY62136FV30 MoBL®

Document Number: 001-08402 Rev. *D

Page 7 of 12

Figure 7. Write Cycle No 1: WE Controlled [15, 19, 20]

Figure 8. Write Cycle 2: CE Controlled [15, 19, 20]

Switching Waveforms (continued)

tHD

tSD

tPWE

tSA

tHA

tAW

tWC

tHZOE

DATAIN

NOTE 21

tBW

tSCE

DATA IO

ADDRESS

CE

WE

OE

BHE/BLE

tHD

tSD

tPWE

tHA

tAW

tSCE

tWC

tHZOE

DATAIN

tBW

tSA

CE

ADDRESS

WE

DATA IO

OE

BHE/BLE

NOTE 21

Notes

19. Data IO is high impedance if OE = VIH.

20. If CE goes HIGH simultaneously with WE = VIH, the output remains in a high impedance state.

21. During this period, the IOs are in output state. Do not apply input signals.

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CY62136FV30 Datasheet(PDF) 7 Page - Cypress Semiconductor

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