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LA72714VA Datasheet(PDF) 10 Page - Sanyo Semicon Device

Part No. LA72714VA
Description  Monolithic Linear IC For JPN TV Multi Channel Television Sound Decoder IC
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Maker  SANYO [Sanyo Semicon Device]
Homepage  http://www.ssdc-jp.com/eng/
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LA72714VA
No.A0626-10/14
I
2C Timing Specifications
Parameter
Symbol
min
max
unit
LOW level input voltage
VIL
-0.5
1.5
V
HIGH level input voltage
VIH
2.5
5.5
V
LOW level output current
IOL
3.0
mA
SCL clock frequency
fSCL
0
100
kHz
Set-up time for a repeated START condition
tSU : STA
4.7
μs
Hold time START condition. After this period, the first clock pulse is generated
tHD : STA
4.0
μs
LOW period of the SCL clock
tLOW
4.7
μs
Rise time of both SDA and SDL signals
tR
0
1.0
μs
HIGH period of the SCL clock
tHIGH
4.0
μs
Fall time of both SDA and SDL signals
tF
0
1.0
μs
Data hold time :
tHD : DAT
0
μs
Data set-up time
tSU : DAT
250
ns
Set-up time for STOP condition
tSU : STO
4.0
μs
BUS free time between a STOP and START condition
tBUF
4.7
μs
Definition of timing
t HD:STA
t SU:STA
t LOW
t R
t F
t HIGH
t HD:DATA
t SU:DAT
t SU:STO
t BUF
SC L
SD A




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