Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

CYRF69103 Datasheet(PDF) 5 Page - Cypress Semiconductor

Part # CYRF69103
Description  Programmable Radio on Chip Low Power
Download  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYRF69103 Datasheet(HTML) 5 Page - Cypress Semiconductor

  CYRF69103 Datasheet HTML 1Page - Cypress Semiconductor CYRF69103 Datasheet HTML 2Page - Cypress Semiconductor CYRF69103 Datasheet HTML 3Page - Cypress Semiconductor CYRF69103 Datasheet HTML 4Page - Cypress Semiconductor CYRF69103 Datasheet HTML 5Page - Cypress Semiconductor CYRF69103 Datasheet HTML 6Page - Cypress Semiconductor CYRF69103 Datasheet HTML 7Page - Cypress Semiconductor CYRF69103 Datasheet HTML 8Page - Cypress Semiconductor CYRF69103 Datasheet HTML 9Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 73 page
background image
CYRF69103
Document #: 001-07611 Rev *B
Page 5 of 73
Data Transmission Modes and Data Rates
The SoC supports four different data transmission modes:
• In GFSK mode, data is transmitted at 1 Mbps, without any
DSSS.
• In 8DR mode, 8 bits are encoded in each
DATA_CODE_ADR derived code symbol transmitted.
• In DDR mode, 2-bits are encoded in each
DATA_CODE_ADR derived code symbol transmitted. (As
in the CYWUSB6934 DDR mode).
• In SDR mode, 1 bit is encoded in each DATA_CODE_ADR
derived code symbol transmitted. (As in the CYWUSB6934
standard modes.)
Both 64-chip and 32-chip DATA_CODE_ADR codes are
supported. The four data transmission modes apply to the data
after the SOP. In particular the length, data, and CRC16 are all
sent in the same mode. In general, lower data rates reduces
packet error rate in any given environment.
The CYRF69103 IC supports the following data rates:
• 1000-kbps (GFSK)
• 250-kbps (32-chip 8DR)
• 125-kbps (64-chip 8DR)
• 62.5-kbps (32-chip DDR)
• 31.25-kbps (64-chip DDR)
• 15.625-kbps (64-chip SDR)
Lower data rates typically provide longer range and/or a more
robust link.
Link Layer Modes
The CYRF69103 IC device supports the following data packet
framing features:
SOP – Packets begin with a 2-symbol Start of Packet (SOP)
marker. This is required in GFSK and 8DR modes, but is
optional in DDR mode and is not supported in SDR mode; if
framing is disabled then an SOP event is inferred whenever
two
successive
correlations
are
detected.
The
SOP_CODE_ADR code used for the SOP is different from that
used for the “body” of the packet, and if desired may be a
different length. SOP must be configured to be the same
length on both sides of the link.
EOP – There are two options for detecting the end of a packet.
If SOP is enabled, then a packet length field may be enabled.
GFSK and 8DR must enable the length field. This is the first
8 bits after the SOP symbol, and is transmitted at the payload
data rate. If the length field is enabled, an End of Packet (EOP)
condition is inferred after reception of the number of bytes
defined in the length field, plus two bytes for the CRC16 (if
enabled—see below). The alternative to using the length field
is to infer an EOP condition from a configurable number of
successive non-correlations; this option is not available in
GFSK mode and is only recommended when using SDR
mode.
CRC16 – The device may be configured to append a 16-bit
CRC16 to each packet. The CRC16 uses the USB CRC
polynomial with the added programmability of the seed. If
enabled, the receiver will verify the calculated CRC16 for the
payload data against the received value in the CRC16 field.
The starting value for the CRC16 calculation is configurable,
and the CRC16 transmitted may be calculated using either the
loaded seed value or a zero seed; the received data CRC16
will be checked against both the configured and zero CRC16
seeds.
CRC16 detects the following errors:
• Any one bit in error
• Any two bits in error (no matter how far apart, which column,
and so on)
• Any odd number of bits in error (no matter where they are)
• An error burst as wide as the checksum itself
Figure 2 shows an example packet with SOP, CRC16 and
lengths fields enabled.
Figure 2. Example Default Packet Format
Packet Buffers and Radio Configuration Registers
Packet data and configuration registers are accessed through
the SPI interface. All configuration registers are directly
addressed through the address field in the SPI packet (as in
the CYWUSB6934). Configuration registers are provided to
allow configuration of DSSS PN codes, data rate, operating
mode, interrupt masks, interrupt status, and others.
Packet Buffers
All data transmission and reception uses the 16-byte packet
buffers—one for transmission and one for reception.
The transmit buffer allows a complete packet of up to 16 bytes
of payload data to be loaded in one burst SPI transaction, and
then transmitted with no further MCU intervention. Similarly,
the receive buffer allows an entire packet of payload data up
to 16 bytes to be received with no firmware intervention
required until packet reception is complete.
P
SOP 1
SOP 2
Length
CRC 16
Payload Data
Preamble
n x 16us
1st Framing
Symbol*
2nd Framing
Symbol*
Packet
length
1 Byte
Period
*Note:32 or 64us
[+] Feedback
[+] Feedback


Similar Part No. - CYRF69103

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CYRF69103 CYPRESS-CYRF69103 Datasheet
1Mb / 65P
   Programmable Radio on Chip Low Power
CYRF69103 CYPRESS-CYRF69103 Datasheet
1Mb / 68P
   Programmable Radio on Chip Low Power
CYRF69103 CYPRESS-CYRF69103 Datasheet
1Mb / 68P
   Programmable Radio on Chip Low Power 16-bit free running timer
CYRF69103-40LFXC CYPRESS-CYRF69103-40LFXC Datasheet
1Mb / 68P
   Programmable Radio on Chip Low Power
CYRF69103-40LFXC CYPRESS-CYRF69103-40LFXC Datasheet
1Mb / 68P
   Programmable Radio on Chip Low Power 16-bit free running timer
More results

Similar Description - CYRF69103

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CYRF69213 CYPRESS-CYRF69213_13 Datasheet
845Kb / 86P
   Programmable Radio on Chip Low Power
CYWUSB6953 CYPRESS-CYWUSB6953_10 Datasheet
1Mb / 68P
   Programmable Radio on Chip Low Power
CYRF69103 CYPRESS-CYRF69103_12 Datasheet
1Mb / 71P
   Programmable Radio on Chip Low Power
CYRF69213 CYPRESS-CYRF69213_08 Datasheet
1Mb / 76P
   Programmable Radio on Chip Low Power
CYRF69103 CYPRESS-CYRF69103_08 Datasheet
1Mb / 65P
   Programmable Radio on Chip Low Power
CYRF69103 CYPRESS-CYRF69103_10 Datasheet
1Mb / 68P
   Programmable Radio on Chip Low Power
CYRF69213 CYPRESS-CYRF69213_12 Datasheet
843Kb / 85P
   Programmable Radio on Chip Low Power
CYRF69213 CYPRESS-CYRF69213 Datasheet
1Mb / 85P
   Programmable Radio on Chip Low Power
CYRF69103 CYPRESS-CYRF69103_13 Datasheet
1Mb / 72P
   Programmable Radio on Chip Low Power
CYRF69103A-40LFXC CYPRESS-CYRF69103A-40LFXC Datasheet
1Mb / 68P
   Programmable Radio on Chip Low Power
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com