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CYU01M16SCG Datasheet(PDF) 6 Page - Cypress Semiconductor

Part # CYU01M16SCG
Description  16-Mbit (1M x 16) Pseudo Static RAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYU01M16SCG Datasheet(HTML) 6 Page - Cypress Semiconductor

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PRELIMINARY
CYU01M16SCG
MoBL3™
Document #: 001-09739 Rev. **
Page 6 of 11
Switching Waveforms
Read Cycle 1 (Address Transition Controlled)[17, 18]
Read Cycle 2 (OE Controlled)[16, 18, 19]
Notes:
16. Whenever CE1 = HIGH or CE2 = LOW, BHE/BLE are taken inactive, they must remain inactive for a minimum of 5 ns.
17. Device is continuously selected. OE = CE1 = VIL and CE2 = VIH.
18. WE is HIGH for Read Cycle.
19. CE is the Logical AND of CE1 and CE2.
ADDRESS
DATA OUT
PREVIOUS DATA VALID
DATA VALID
tRC
t
AA
t
OHA
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
HIGH IMPEDANCE
t
HZOE
HIGH
OE
CE1
ICC
ISB
IMPEDANCE
ADDRESS
VCC
SUPPLY
CURRENT
t
HZBE
BHE
/BLE
t
LZBE
t
HZCE
DATA OUT
t
DBE
tCD
CE2
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