Part Name
         Description
PM7384

 Frame Engine and Data Link Manager ( 4 Page)


PMC
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PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
iii
9.6.2
DMA TRANSACTION CONTROLLER...........................52
9.6.3
WRITE DATA PIPELINE/MUX .......................................52
9.6.4
DESCRIPTOR INFORMATION CACHE ........................52
9.6.5
FREE QUEUE CACHE ..................................................53
9.7
PCI CONTROLLER......................................................................53
9.7.1
MASTER MACHINE ......................................................54
9.7.2
MASTER LOCAL BUS INTERFACE..............................56
9.7.3
TARGET MACHINE .......................................................57
9.7.4
CBI BUS INTERFACE ...................................................59
9.7.5
ERROR / BUS CONTROL .............................................59
9.8
TRANSMIT DMA CONTROLLER.................................................59
9.8.1
DATA STRUCTURES ....................................................60
9.8.2
TASK PRIORITIES ........................................................72
9.8.3
DMA TRANSACTION CONTROLLER...........................72
9.8.4
READ DATA PIPELINE..................................................72
9.8.5
DESCRIPTOR INFORMATION CACHE ........................72
9.8.6
FREE QUEUE CACHE ..................................................73
9.9
TRANSMIT HDLC CONTROLLER / PARTIAL PACKET BUFFER73
9.9.1
TRANSMIT HDLC PROCESSOR..................................73
9.9.2
TRANSMIT PARTIAL PACKET BUFFER PROCESSOR74
9.10 TRANSMIT CHANNEL ASSIGNER .............................................76
9.10.1
LINE INTERFACE..........................................................78
9.10.2
PRIORITY ENCODER ...................................................79
9.10.3
CHANNEL ASSIGNER ..................................................79
1  2  3  4 



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