PM7800

Preliminary

Digital Correction Signal Processor

PALADIN-10

PMC-2001613 (P1)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

© Copyright PMC-Sierra, Inc. 2000

FEATURES

• Digitial Adaptive Pre-Distortion for

wideband linearization of power

amplifiers in wireless basestations.

• Digitial Correction for Analog

Quadrature Modulation Distortion.

• Digital Soft Pre-compression for

efficiency management.

• Input Signal Bandwidth up to 10 MHz.

Sample rate up to 80 MHz.

• Programmable, variable input data

rate.

• 16-bit microprocessor bus interface for

adaptive control processor

compensation engine.

• Serial interface (configurable to SPI or

I2C operation) for update of power and

carrier values.

• 48 general-purpose IO pins, eight of

which are edge-triggered interrupt

sources.

• Standard five-signal IEEE 1149.1

JTAG test port for boundary scan

board test purposes.

PACKAGING

• Low-power 1.8 V CMOS core logic

with 3.3 V CMOS/TTL compatible

digital inputs and digital outputs.

• Industrial temperature range (-40 °C to

+85 °C).

• 304-pin SBGA with a body size of

31mm x 31mm.

APPLICATIONS

• Multi-carrier WCDMA Base

Transceiver Subsystems (BTS).

• CDMA2000 BTS (requires firmware

upgrade).

• GSM/TDMA/EDGE BTS (requires

firmware upgrade).

BLOCK DIAGRAM

PALADIN-10 Padring

PALADIN-10

SCS_N

SD

SCLK

HOP_N

RESET_N

VREF

REFCLK

DCLK

CPUCLK

VOBS

PALADIN-10 Core

Input Module

Pre-

Predistorter

Circuitry

Predistortion

Filter

Modulation

Circuitry

Capture

Module

CPU

Interface

JTAG

VD

GPIO