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AS7C256B Datasheet(PDF) 4 Page - Alliance Semiconductor Corporation |
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AS7C256B Datasheet(HTML) 4 Page - Alliance Semiconductor Corporation |
4 / 8 page AS7C256B 12/5/06; V.1.0 Alliance Memory P. 4 of 8 ® Read cycle (over the operating range)3,9 Key to switching waveforms Read waveform 1 (address controlled)3,6,7,9 Read waveform 2 (CE controlled)3,6,8,9 Parameter Symbol AS7C256B-12 Unit Notes Min Max Read cycle time tRC 12 – ns Address access time tAA –12 ns 3 Chip enable (CE) access time tACE –12 ns 3 Output enable (OE) access time tOE –6 ns Output hold from address change tOH 3– ns 5 CE LOW to output in low Z tCLZ 4 – ns 4, 5 CE HIGH to output in high Z tCHZ 0 6 ns 4, 5 OE LOW to output in low Z tOLZ 0 – ns 4, 5 OE HIGH to output in high Z tOHZ 0 6 ns 4, 5 Power up time tPU 0 – ns 4, 5 Power down time tPD –12 ns 4, 5 Undefined output/don’t care Falling input Rising input Address Dout Data valid tOH tAA tRC Supply current CE OE Dout tRC tOE tOLZ tACE tCHZ tCLZ tPU tPD ICC ISB 50% 50% tOHZ Data valid |
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