Si5325

Preliminary Rev. 0.26

7

4C2B

O

LVCMOS

CKIN2 Invalid Indicator.

This pin functions as a LOS (and optionally FOS) alarm indi-

cator for CKIN2 if CK2_BAD_PIN =1.

0 = CKIN2 present.

1 = LOS (FOS) on CKIN2.

The active polarity can be changed by CK_BAD_POL. If

CK2_BAD_PIN = 0, the pin tristates.

5, 10, 11,

15, 32

Supply

Supply.

The device operates from a 1.8, 2.5, or 3.3 V supply. Bypass

capacitors should be associated with the following Vdd pins:

5

0.1 µF

10

0.1 µF

32

0.1 µF

A 1.0 µF should be placed as close to device as is practical.

6, 8, 31

GND

GND

Supply

Ground.

Must be connected to system ground. Minimize the ground

path impedance for optimal performance of this device.

12

13

CKIN2+

CKIN2–

IMulti

Clock Input 2.

Differential input clock. This input can also be driven with a

single-ended signal. Input frequency range is 10 to 710 MHz.

16

17

CKIN1+

CKIN1–

IMulti

Clock Input 1.

Differential input clock. This input can also be driven with a

single-ended signal. Input frequency range is 10 to 710 MHz.

21

CS_CA

I/O

LVCMOS

Input Clock Select/Active Clock Indicator.

In manual clock selection mode, this pin functions as the

manual input clock selector if the CKSEL_PIN is set to 1.

0 = Select CKIN1.

1 = Select CKIN2.

If CKSEL_PIN =0, the CKSEL_REG register bit controls this

function and this input tristates.

In automatic clock selection mode, this pin indicates which of

the two input clocks is currently the active clock. If alarms

exist on both clocks, CA will indicate the last active clock that

was used before entering the digital hold state. The

CK_ACTV_PIN register bit must be set to 1 to reflect the

active clock status to the CA output pin.

0 = CKIN1 active input clock.

1 = CKIN2 active input clock.

If CK_ACTV_PIN = 0, this pin will tristate. The CA status will

always be reflected in the CK_ACTV_REG read only register

bit.

Table 3. Si5325 Pin Descriptions (Continued)

Pin #

Pin Name

I/O

Signal Level

Description

Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5325 Register Map.