Electronic Components Datasheet Search |
|
SN74LV8154PWRG4 Datasheet(PDF) 1 Page - Texas Instruments |
|
SN74LV8154PWRG4 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 12 page SN74LV8154 DUAL 16BIT BINARY COUNTERS WITH 3STATE OUTPUT REGISTERS SCLS589 − AUGUST 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Can Be Used as Two 16-Bit Counters or a Single 32-Bit Counter D 2-V to 5.5-V VCC Operation D Max tpd of 25 ns at 5 V (RCLK to Y) D Typical VOLP (Output Ground Bounce) <0.7 V at VCC = 5 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >4.4 V at VCC = 5 V, TA = 25°C D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering information The SN74LV8154 is a dual 16-bit binary counter with 3-state output registers, designed for 2-V to 5.5-V VCC operation. This 16-bit counter (A or B) feeds a 16-bit storage register, and each storage register is further divided into an upper byte and lower byte. The GAL, GAU, GBL, GBU inputs are used to select the byte that needs to be output at Y0−Y7. CLKA is the clock for A counter, and CLKB is the clock for B counter. RCLK is the clock for the A and B storage registers. All three clock signals are positive-edge triggered. A 32-bit counter can be realized by connecting CLKA and CLKB together and by connecting RCOA to CLKBEN. To ensure the high-impedance state during power up or power down, GAL, GAU, GBL, and GBU should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP − N Tube SN74LV8154N SN74LV8154N −40 °C to 85°C TSSOP − PW Tube SN74LV8154PW LV8154 −40 C to 85 C TSSOP − PW Tape and reel SN74LV8154PWR LV8154 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. N OR PW PACKAGE (TOP VIEW) CLKA CLKB GAL GAU GBL GBU RCLK RCOA CLKBEN GND VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 CCLR 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 Copyright 2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Similar Part No. - SN74LV8154PWRG4 |
|
Similar Description - SN74LV8154PWRG4 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |