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R2033K Datasheet(PDF) 10 Page - RICOH electronics devices division

Part # R2033K
Description  3 wire interface Real-Time Clock ICs
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Manufacturer  RICOH [RICOH electronics devices division]
Direct Link  http://www.ricoh.com
Logo RICOH - RICOH electronics devices division

R2033K Datasheet(HTML) 10 Page - RICOH electronics devices division

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R2033K/T
10
settings can be selected between 1.6V and 1.3V through internal register settings. The sampling rate is normally
1s.
The oscillation halt sensing circuit and the power-on reset flag are configured to confirm the established
invalidation of time data in contrast to the supply voltage monitoring circuit intended to confirm the potential
invalidation of time data. Further, the supply voltage monitoring circuit can be applied to battery supply voltage
monitoring.
Periodic Interrupt Function
The R2033K/T incorporates the periodic interrupt circuit configured to generate periodic interrupt signals aside
from interrupt signals generated by the alarm interrupt circuit for output from the INTR pin. Periodic interrupt
signals have five selectable frequency settings of 2 Hz (once per 0.5 seconds), 1 Hz (once per 1 second), 1/60
Hz (once per 1 minute), 1/3600 Hz (once per 1 hour), and monthly (the first day of every month).
Further,
periodic interrupt signals also have two selectable waveforms, a normal pulse form (with a frequency of 2 Hz or 1
Hz) and special form adapted to interruption from the CPU in the level mode (with second, minute, hour, and
month interrupts). The condition of periodic interrupt signals can be monitored with using a polling function.
32kHz Clock Output
The R2033K/T incorporates a 32-kHz clock circuit configured to generate clock pulses with the oscillation
frequency of a 32.768kHz crystal oscillator for output from the 32KOUT pin. The 32KOUT pin is CMOS push-pull
output and the output is enabled and disabled when the CLKC pin is held high, and low or open, respectively.
The 32-kHz clock output can be disabled by certain register settings but cannot be disabled without manipulation
of any two registers with different addresses to prevent disabling in such events as the runaway of the CPU.
The 32-kHz clock circuit is enabled at power-on, when the CLKC pin is held high.


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