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BS62UV256PCP10 Datasheet(PDF) 4 Page - Brilliance Semiconductor |
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BS62UV256PCP10 Datasheet(HTML) 4 Page - Brilliance Semiconductor |
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4 / 10 page  BS62UV256 R0201-BS62UV256 Revision 2.6 Sep. 2006 4 n AC TEST CONDITIONS (Test Load and Input/Output Reference) Input Pulse Levels Vcc / 0V Input Rise and Fall Times 1V/ns Input and Output Timing Reference Level 0.5Vcc tCLZ, tOLZ, tCHZ, tOHZ, tWHZ CL = 5pF+1TTL Output Load Others CL = 100pF+1TTL 1. Including jig and scope capacitance. n KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS OUTPUTS MUST BE STEADY MUST BE STEADY MAY CHANGE FROM “H” TO “L” WILL BE CHANGE FROM “H” TO “L” MAY CHANGE FROM “L” TO “H” WILL BE CHANGE FROM “L” TO “H” DON ’T CARE ANY CHANGE PERMITTED CHANGE : STATE UNKNOW DOES NOT APPLY CENTER LINE IS HIGH INPEDANCE “OFF” STATE n AC ELECTRICAL CHARACTERISTICS (T A = -40 OC to +85OC) READ CYCLE CYCLE TIME : 100ns CYCLE TIME : 150ns JEDEC PARAMETER NAME PARANETER NAME DESCRIPTION MIN. TYP. MAX. MIN. TYP. MAX. UNITS tAVAX tRC Read Cycle Time 100 -- -- 150 -- -- ns tAVQX tAA Address Access Time -- -- 100 -- -- 150 ns tE1LQV tACS Chip Select Access Time -- -- 100 -- -- 150 ns tGLQV tOE Output Enable to Output Valid -- -- 50 -- -- 100 ns tE1LQX tCLZ Chip Select to Output Low Z 10 -- -- 10 -- -- ns tGLQX tOLZ Output Enable to Output Low Z 10 -- -- 10 -- -- ns tE1HQZ tCHZ Chip Select to Output High Z -- -- 35 -- -- 35 ns tGHQZ tOHZ Output Enable to Output High Z -- -- 30 -- -- 30 ns tAVQX tOH Data Hold from Address Change 10 -- -- 10 -- -- ns CL (1) 1 TTL Output ALL INPUT PULSES → ← 90% VCC GND Rise Time : 1V/ns Fall Time : 1V/ns 90% → ← 10% 10% |
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