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SC16C2550BIN40 Datasheet(PDF) 4 Page - NXP Semiconductors |
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SC16C2550BIN40 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 43 page SC16C2550B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 15 February 2007 4 of 43 NXP Semiconductors SC16C2550B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs 5. Pinning information 5.1 Pinning Fig 2. Pin configuration for HVQFN32 Fig 3. Pin configuration for DIP40 002aab746 SC16C2550BIBS Transparent top view A2 OP2B CSA A1 TXB A0 TXA INTB RXA INTA RXB OP2A D7 RTSA D6 RESET 8 17 7 18 6 19 5 20 4 21 3 22 2 23 1 24 terminal 1 index area SC16C2550BIN40 D0 VCC D1 RIA D2 CDA D3 DSRA D4 CTSA D5 RESET D6 DTRB D7 DTRA RXB RTSA RXA OP2A TXA INTA TXB INTB OP2B A0 CSA A1 CSB A2 XTAL1 CTSB XTAL2 RTSB IOW RIB CDB DSRB GND IOR 002aaa596 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 21 24 23 26 25 40 39 38 37 36 35 34 33 32 31 30 29 28 27 |
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