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W78LE516 Datasheet(PDF) 7 Page - Winbond |
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W78LE516 Datasheet(HTML) 7 Page - Winbond |
7 / 37 page W78LE516/W78L516A Publication Release Date: November 6, 2006 - 7 - Revision A7 5. FUNCTIONAL DESCRIPTION The W78L516 architecture consists of a core controller surrounded by various registers, four general purpose I/O ports, one special purpose programmable 4-bits I/O port, 512 bytes of RAM, three timer/counters, a serial port. The processor supports 111 different opcodes and references both a 64K program address space and a 64K data storage space. 5.1 RAM The internal data RAM in the W78L516 is 512 bytes. It is divided into two banks: 256 bytes of scratchpad RAM and 256 bytes of AUX-RAM. These RAMs are addressed by different ways. • RAM 0H −7FH can be addressed directly and indirectly as the same as in 8051. Address pointers are R0 and R1 of the selected register bank. • RAM 80H −FFH can only be addressed indirectly as the same as in 8051. Address pointers are R0, R1 of the selected registers bank. • AUX-RAM 0H −FFH is addressed indirectly as the same way to access external data memory with the MOVX instruction. Address pointers are R0 and R1 of the selected register bank and DPTR register. An access to external data memory locations higher than FFH will be performed with the MOVX instruction in the same way as in the 8051. The AUX-RAM is disabled after a reset. Setting the bit 4 in CHPCON register will enable the access to AUX-RAM. When AUX-RAM is enabled the instructions of "MOVX @Ri" will always access to on-chip AUX-RAM. When executing from internal program memory, an access to AUX-RAM will not affect the Ports P0, P2, WR and RD . Example, CHPENR REG F6H CHPCON REG BFH MOV CHPENR, #87H MOV CHPENR, #59H ORL CHPCON, #00010000B ; enable AUX-RAM MOV CHPENR, #00H MOV R0, #12H MOV A, #34H MOVX @R0, A ; Write 34h data to 12h address. 5.2 Timers 0, 1, and 2 Timers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0, TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide control functions for timers 0, 1. The T2CON register provides control functions for Timer 2. RCAP2H and RCAP2L are used as reload/capture registers for Timer 2. The operations of Timer 0 and Timer 1 are the same as in the W78C51. Timer 2 is a 16-bit timer/counter that is configured and controlled by the T2CON register. Like Timers 0 and 1, Timer 2 can operate as either an external event counter or as an internal timer, depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating modes: capture, auto-reload, and baud rate generator. The clock speed at capture or auto-reload mode is the same as that of Timers 0 and 1. |
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