MB15F74UV_04 datasheet(3/25 Pages) FUJITSU | Dual Serial Input PLL Frequency Synthesizer

3 page

MB15F74UV

s PIN DESCRIPTION

Pin no.

name

I/O

Descriptions

1GND

 Ground pin for OSC input buffer and the shift register circuit.

2finIF

Prescaler input pin for the IF-PLL.

Connection to an external VCO should be AC coupling.

3XfinIF

Prescaler complimentary input for the IF-PLL section.

This pin should be grounded via a capacitor.

4GNDIF

 Ground pin for the IF-PLL section.

5VCCIF



Power supply voltage input pin for the IF-PLL section, the shift register and the oscillator

input buffer.

6DoIF

Charge pump output for the IF-PLL section.

7PSIF

Power saving mode control pin for the IF-PLL section. This pin must be set at “L” when

the power supply is started up. (Open is prohibited.)

PSIF

= “H” ; Normal mode/PSIF = “L” ; Power saving mode

LD/fout

Lock detect signal output (LD) /phase comparator monitoring output (fout) pin. The out-

put signal is selected by LDS bit in a serial data.

LDS bit

= “H” ; outputs fout signal/LDS bit = “L” ; outputs LD signal

9PSRF

Power saving mode control for the RF-PLL section. This pin must be set at “L” when the

power supply is started up. (Open is prohibited. )

PSRF

= “H” ; Normal mode/PSRF = “L” ; Power saving mode

DoRF

Charge pump output for the RF-PLL section.

VCCRF

 Power supply voltage input pin for the RF-PLL section.

GNDRF

 Ground pin for the RF-PLL section

XfinRF

Prescaler complimentary input pin for the RF-PLL section.

This pin should be grounded via a capacitor.

finRF

Prescaler input pin for the RF-PLL.

Connection to an external VCO should be via AC coupling.

Load enable signal input pin (with the schmitt trigger circuit)

When LE is set “H”, data in the shift register is transferred to the corresponding latch ac-

cording to the control bit in a serial data.

Data

Serial data input pin (with the schmitt trigger circuit)

Data is transferred to the corresponding latch (IF-ref. counter, IF-prog. counter,

RF-ref. counter, RF-prog. counter) according to the control bit in a serial data.

Clock

Clock input pin for the 23-bit shift register (with the schmitt trigger circuit)

One bit data is shifted into the shift register on a rising edge of the clock.

OSCIN

The programmable reference divider input pin. TCXO should be connected with an AC

coupling capacitor.

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