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MB95120MB Datasheet(PDF) 5 Page - Fujitsu Component Limited. |
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MB95120MB Datasheet(HTML) 5 Page - Fujitsu Component Limited. |
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5 / 80 page  MB95120MB Series 5 (Continued) *1 : For ROM capacitance and RAM capacitance, refer to “ ■ MEMORY LINEUP”. *2 : For details of option, refer to “ ■ MASK OPTION”. *3 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc. Note : Part number of evaluation product in MB95120MB series is MB95FV100D-103. When using it, the MCU board (MB2146-303A) is required. MB95128MB MB95F124MB MB95F126MB MB95F128MB MB95F124NB MB95F126NB MB95F128NB MB95F124JB MB95F126JB MB95F128JB LCD controller (LCDC) COM output : 4 (Max) SEG output : 40 (Max) LCD drive power supply (bias) pin : 4 (Max) 40 SEG × 4 COM : 160 pixels can be displayed. Duty LCD mode Operable in LCD standby mode With blinking function Built-in division resistance for LCD drive 16-bit reload timer (1 channel) Two clock modes and two counter operating modes can be selected. Square waveform output Count clock : 7 internal clocks and external clock can be selected. Counter operating mode : reload mode or one-shot mode can be selected. 8/16-bit compound timer (2 channels) Each channel of the timer can be used as “8-bit timer × 2 channels” or “16-bit timer × 1 channel”. Built-in timer function, PWC function, PWM function, capture function and square waveform output Count clock : 7 internal clocks and external clock can be selected. 16-bit PPG (2 channels) PWM mode or one-shot mode can be selected. Counter operating clock : Eight selectable clock sources Support for external trigger start 8/16-bit PPG (2 channels) Each channel of the PPG can be used as “8-bit PPG × 2 channels” or “16-bit PPG × 1 channel”. Counter operating clock : Eight selectable clock sources Watch counter Count clock : Four selectable clock sources (125 ms, 250 ms, 500 ms, or 1 s) Counter value can be set from 0 to 63 (Capable of counting for 1 minute when selecting clock source 1 second and setting counter value to 60) . Watch prescaler (1 channel) 4 selectable interval times (125 ms, 250 ms, 500 ms, or 1 s) External interrupt (12 channels) Interrupt by edge detection (rising, falling, or both edges can be selected.) Can be used to recover from standby modes. Flash memory Supports automatic programming, Embedded AlgorithmTM *3 Write/Erase/Erase-Suspend/Resume commands A flag indicating completion of the algorithm Number of write/erase cycles (Minimum) : 10000 times Data retention time : 20 years Erase can be performed on each block Block protection with external programming voltage Dual operation Flash memory Flash Security Feature for protecting the content of the Flash Standby mode Sleep, stop, watch, and timebase timer Parameter Part number |
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