EM77F900 datasheet(6/136 Pages) EMC

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EM77F900 Datasheet(PDF) 6 Page - ELAN Microelectronics Corp

Part #	EM77F900

Description	USB HUBBB Controller

Download	136 Pages

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Manufacturer	EMC [ELAN Microelectronics Corp]

Direct Link	http://www.emc.com.tw

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Contents

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Product Specification (V1.0) 07.31.2007

9.6.2

Endpoint X Control Register – EP1/2/3CNTR .................................................. 80

9.6.3

Endpoint Interrupt Event Status Register – EPINTR ........................................ 80

9.6.4

Endpoint Interrupt Event Enable Control Register – EPINTE .......................... 82

9.6.5

State Interrupt Event Flag Register – STAINTR ............................................... 82

9.6.6

State interrupt event Enable Control Register – STAINTE............................... 83

9.6.7

Function Address Register – FAR .................................................................... 83

9.6.8

Endpoint 0 RX Token Register – EP0RXTR..................................................... 83

9.6.9

Endpoint 0 RX Command/Status Register – EP0RXCSR............................... 84

9.6.10 Endpoint 0 TX Command/Status Register – EP0TXCSR................................. 85

9.6.11 Endpoint X Command/Status Register – EP1/2/3CSR .................................... 86

9.6.12 Endpoint 0 RX Count Register – EP0RXCTR .................................................. 87

9.6.13 Endpoint 0 TX Count Register – EP0TXCTR................................................... 88

9.6.14 Endpoint X Count Register – EP1/2/3CTR....................................................... 88

9.6.15 Endpoint 0 RX Data Register – EP0RXDAR .................................................... 88

9.6.16 Endpoint 0 TX Data Register – EP0TXDAR..................................................... 88

9.6.17 Endpoint X Data Register – EP1/2/3DAR......................................................... 89

9.6.18 Hub Global State Register – HGSR.................................................................. 89

9.6.19 Hub Interrupt Event Register – HINTR............................................................. 90

9.6.20 Hub Interrupt Event Enable Control Register – HINTE .................................... 91

9.6.21 Hub Address Register – HAR ........................................................................... 91

9.6.22 HUB Endpoint 0 RX Token Register – HEP0RXTR ......................................... 91

9.6.23 HUB Endpoint 0 Rx Command/Status Register – HEP0RXCSR ..................... 92

9.6.24 HUB Endpoint 0 TX Command/Status Register – HEP0TXCSR ..................... 93

9.6.25 HUB Endpoint 1 TX Command/Status Register – HEP1TXCSR ..................... 94

9.6.26 HUB Endpoint 0 RX Count Register – HEP0RXCTR....................................... 95

9.6.27 HUB Endpoint 0 TX count Register – HEP0TXCTR ........................................ 95

9.6.28 HUB Endpoint 0 RX Data Register – HEP0RXDAR......................................... 95

9.6.29 HUB Endpoint 0 TX Data Register – HEP0TXDAR.......................................... 95

9.6.30 HUB Endpoint 1 TX Data Register – HEP1TXDAR.......................................... 95

9.6.31 HUB Port Control Register – HPCONR............................................................ 96

9.6.32 HUB Port State Register – HPSTAR ................................................................ 97

9.6.33 Hub Status Register – HSR .............................................................................. 97

9.6.34 Hub Port X Status Register – HPSR1/2/3/4 ..................................................... 98

9.6.35 Hub PortX Status Change Register – HPSCR1/2/3/4 ...................................... 99

9.6.36 Frame Number Low-Byte Register – FNLR ..................................................... 99

9.6.37 Frame Number High-Byte Register – FNHR .................................................... 99

10 Direction Serial Peripheral Interface (SPI) ......................................................... 100

10.1 Introduction................................................................................................... 100

10.2 Features ....................................................................................................... 100

10.3 Block Diagram .............................................................................................. 100

10.4 Transceiver Timing ....................................................................................... 101

10.5 SPI Related Registers .................................................................................. 101

10.6 Function Description ..................................................................................... 102

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