Part Name
         Description
TSL1406R

 768 × 1 LINEAR SENSOR ARRAY WITH HOLD ( 14 Page)


TAOS
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TSL1406R, TSL1406RS
768 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS042D − APRIL 2007
1
The LUMENOLOGY r Company
r
r
Copyright E 2007, TAOS Inc.
www.taosinc.com
D 768 × 1 Sensor-Element Organization
D 400 Dot-Per-Inch (DPI) Sensor Pitch
D High Linearity and Uniformity
D Wide Dynamic Range . . . 4000:1 (72 dB)
D Output Referenced to Ground
D Low Image Lag ... 0.5% Typ
D Operation to 8 MHz
D Single 3-V to 5-V Supply
D Rail-to-Rail Output Swing (AO)
D No External Load Resistor Required
D Replacement for TSL1406
Description
The TSL1406R is a 400 dots-per-inch (DPI) linear
sensor array consisting of two 384-pixel sections,
each with its own output. The sections are aligned
to form a contiguous 768 × 1 pixel array. The
device incorporates a pixel data-hold function that
provides simultaneous integration-start and
integration-stop times for all pixels.
Pixels measure 63.5 μm by 55.5 μm, with 63.5-μm center-to-center spacing and 8-μm spacing between pixels.
Operation is simplified by internal logic that requires only a serial-input (SI) pulse and a clock.
The device operates from a single 5-V power source. The two sections of 384 pixels each can be read out
separately or can be cascaded to provide a single output for all 768 pixels (see Figure 9).
The TSL1406RS is the same device mounted in a shorter package. These devices are intended for use in a
wide variety of applications including mark and code reading, OCR and contact imaging, edge detection and
positioning, and optical encoding.
Functional Block Diagram (each section)
2, 8
4, 10
SI
CLK
384-Bit Shift Register (2 each)
Q384 (Q768)
Switch Control Logic
Q3
Q2
Q1
Hold
SO
7, 11
3, 9
Hold
Output
Buffer
Gain
Trim
VDD
AO
GND
5
13
6, 12
Integrator
Reset
_
+
Pixel 1
(385)
Pixel
2
(386)
Pixel
384
(768)
Pixel
3
(387)
Sample/Hold/
Output
Analog
Bus
S1
S2
2
1
3
1
2
r
r
Texas Advanced Optoelectronic Solutions Inc.
1001 Klein Road S Suite 300 S Plano, TX 75074 S (972) 673-0759
TSL1406R
(TOP VIEW)
VPP
SI1
HOLD1
CLK1
GND
AO1
SO1
SI2
HOLD2
CLK2
SO2
AO2
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
1  2  3  4  5  6  7  8  9  10  11  12  13  14 



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