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MIC2225-4SYMT Datasheet(PDF) 10 Page - Micrel Semiconductor |
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MIC2225-4SYMT Datasheet(HTML) 10 Page - Micrel Semiconductor |
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10 / 14 page  Micrel, Inc. MIC2225 October 2007 10 M9999-101107-B Functional Description VIN VIN provides power to the MOSFETs for the switch mode regulator section, along with the current limiting sensing. Due to the high switching speeds, it is recommended that an 1µF capacitor be placed close to VIN and the power ground (PGND) pin for bypassing. Please refer to layout recommendations. AVIN Analog VIN (AVIN) provides power to the LDO section and the bias through an internal 6Ω resistor. AVIN and VIN must be tied together. Careful layout should be considered to ensure high frequency switching noise caused by VIN is reduced before reaching AVIN. LDO The LDO pin is the output of the linear regulator and needs to be connected to a 2.2µF output capacitor. EN The enable pin provides a logic level control of the output. In the off state, the supply current of the device is greatly reduced (typically <1µA). Also, in the off state, the output drive is placed in a "tri-stated" condition, wherein both the high side P-channel MOSFET and the low-side N-channel are in an “off” or non-conducting state. Do not drive the enable pin above the supply voltage. ENLDO The enable pin provides a logic level control of the LDO output. In the off state, supply current of the device is greatly reduced (typically <1µA). Do not drive the enable pin above the supply voltage. BIAS The BIAS pin supplies the power to the internal power to the control and reference circuitry. The bias is powered from AVIN through an internal 6Ω resistor. A small 0.1µF capacitor is recommended for bypassing. FB The feedback pin (FB) provides the control path to control the output. For fixed output, the controller output is directly connected to the feedback (FB) pin. SW The switch (SW) pin connects directly to the inductor and provides the switching current necessary to operate in PWM mode. Due to the high speed switching on this pin, the switch node should be routed away from sensitive nodes. PGND Power ground (PGND) is the ground path for the high current PWM mode. The current loop for the power ground should be as small as possible and separate from the Analog ground (AGND) loop. Refer to the layout considerations for more details. SGND Signal ground (SGND) is the ground path for the biasing and control circuitry. The current loop for the signal ground should be separate from the Power ground (PGND) loop. Refer to the layout considerations for more details. |
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