KK74ACT175 datasheet(4/6 Pages) KODENSHI

Part #	KK74ACT175

Description	Quad D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS

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Manufacturer	KODENSHI [KODENSHI_AUK CORP.]

Direct Link	http://www.kodenshi.co.kr

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KK74ACT175

AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)

Guaranteed Limits

Symbol

Parameter

25

°C

-40

°C to 85°C

Unit

Min

Max

Min

Max

fmax

Maximum Clock Frequency (Figure 1)

175

145

MHz

tPLH

Propagation Delay, Clock to Q or Q (Figure 1)

2.0

10.0

1.5

11.0

ns

tPHL

Propagation Delay, Clock to Q or Q (Figure 1)

2.0

11.0

1.5

12.0

ns

tPHL, tPLH

Propagation Delay, Reset to Q or Q (Figure 2)

2.0

9.5

1.5

10.5

ns

CIN

Maximum Input Capacitance

4.5

pF

Typical @25

°C,V

CC=5.0 V

CPD

Power Dissipation Capacitance

45

pF

TIMING REQUIREMENTS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)

Guaranteed Limits

Symbol

Parameter

25

°C

-40

°C to 85°C

Unit

tsu (H)

(L)

Minimum Setup Time, Data to Clock (Figure 3)

2.0

2.5

2.0

2.5

ns

th

Minimum Hold Time, Clock to Data (Figure 3)

1.0

ns

tw

Minimum Pulse Width, Reset (Figure 2)

3.0

4.0

ns

tw

Minimum Pulse Width, Clock (Figure 1)

3.0

3.5

ns

trec

Minimum Recovery Time, Reset to Clock

(Figure 2)

0

ns

4

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KK74ACT175 Datasheet(PDF) 4 Page - KODENSHI_AUK CORP.

KK74ACT175 Datasheet(HTML) 4 Page - KODENSHI_AUK CORP.

Similar Part No. - KK74ACT175

Similar Description - KK74ACT175

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