TECHNICAL DATA

KK74ACT533

Octal 3-State Inverting

Transparent Latch

High-Speed Silicon-Gate CMOS

ORDERING INFORMATION

KK74ACT533N Plastic

KK74ACT533DW SOIC

The KK74ACT533 is identical in pinout to the LS/ALS533,

HC/HCT533. The KK74ACT533 may be used as a level converter for

interfacing TTL or NMOS outputs to High Speed CMOS inputs.

These latches appear transparent to data (i.e., the outputs change

asynchronously) when Latch Enable is high. The data appears as the

outputs in inverted form. When Latch Enable goes low, data meeting the

setup and hold time becomes latched.

The Output Enable input does not affect the state of the latches, but

when Output Enable is high, all device outputs are forced to the high-

impedance state. Thus, data may be latched even when the outputs are not

enabled.

• TTL/NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA; 0.1 µA @ 25°C

PIN ASSIGNMENT

FUNCTION TABLE

Inputs

Output

Output

Enable

Latch

Enable

D

Q

L

H

H

L

L

H

L

H

L

L

X

no

change

H

X

X

Z

X = don’t care

Z = high impedance

• Outputs Source/Sink 24 mA

• 3-State Outputs for Bus Interfacing

LOGIC DIAGRAM

P

PIN 10 = GND

1