TECHNICAL DATA

KK74HCT74A

Dual D Flip-Flop with Set and Reset

High-Performance Silicon-Gate CMOS

ORDERING INFORMATION

KK74HCT74AN Plastic

KK74HCT74AD SOIC

The KK74HCT74A is identical in pinout to the LS/ALS74. This device

may be used as a level converter for interfacing TTL or NMOS outputs to

High Speed CMOS inputs.

This device consists of two D flip-flops with individual Set, Reset, and

Clock inputs. Information at a D-input is transferred to the corresponding Q

output on the next positive going edge of the clock input. Both Q and Q

outputs are available from each flip-flop. The Set and Reset inputs are

asynchronous.

• TTL/NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

LOGIC DIAGRAM

PIN 7 = GND

PIN ASSIGNMENT

FUNCTION TABLE

Inputs

Outputs

Set

Reset

Clock

Data

Q

Q

L

H

X

X

H

L

H

L

X

X

L

H

L

L

X

X

H

*

H

*

H

H

H

H

L

H

H

L

L

H

H

H

L

X

No Change

H

H

H

X

No Change

H

H

X

No Change

*Both outputs will remain high as long as Set and

Reset are low, but the output states are

unpredictable if Set and Reset go high

simultaneously.

X = don’t care

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