FM25CL64-GA datasheet(6/13 Pages) RAMTRON

Part #	FM25CL64-GA

Description	64Kb FRAM Serial 3V Memory

Download	13 Pages

Scroll/Zoom	100%

Manufacturer	RAMTRON [Ramtron International Corporation]

Direct Link	http://www.ramtron.com

Logo

6 / 13 page

FM25CL64 - Automotive Temp.

Rev. 3.0

May 2007

Page 6 of 13

RDSR - Read Status Register

The RDSR command allows the bus master to verify

the contents of the Status register. Reading Status

provides information about the current state of the

write protection features. Following the RDSR op-

code, the FM25CL64 will return one byte with the

contents of the Status register. The Status register is

described in detail in a later section.

WRSR – Write Status Register

The WRSR command allows the user to select

certain write protection features by writing a byte to

the Status register. Prior to issuing a WRSR

command, the /WP pin must be high or inactive.

Note that on the FM25CL64, /WP only prevents

writing to the Status register, not the memory array.

Prior to sending the WRSR command, the user must

send a WREN command to enable writes. Note that

executing a WRSR command is a write operation

and therefore clears the Write Enable Latch.

Figure 7. RDSR Bus Configuration

Figure 8. WRSR Bus Configuration

Status Register & Write Protection

The write protection features of the FM25CL64 are

multi-tiered. First, a WREN op-code must be issued

prior to any write operation. Assuming that writes are

enabled using WREN,

writes to

memory are

controlled by the Status register. As described above,

writes to the status register are performed using the

WRSR command and subject to the /WP pin. The

Status register is organized as follows.

Table 2. Status Register

Bit

7

6

5

4

3

2

1

0

Name

WPEN

0

BP1

BP0

WEL

0

Bits 0 and 4-6 are fixed at 0 and cannot be modified.

Note that bit 0 (Ready in EEPROMs) is unnecessary

as the FRAM writes in real-time and is never busy.

The WPEN, BP1 and BP0 control write protection

features. They are nonvolatile (shaded yellow). The

WEL flag indicates the state of the Write Enable

Latch. Attempting to directly write the WEL bit in

the status register has no effect on its state. This bit

is internally set and cleared via the WREN and

WRDI commands, respectively.

BP1 and BP0 are memory block write protection

bits. They specify portions of memory that are write

protected as shown in the following table.

Table 3. Block Memory Write Protection

BP1

BP0

Protected Address Range

0

None

0

1

1800h to 1FFFh (upper ¼)

1

0

1000h to 1FFFh (upper ½)

1

0000h to 1FFFh (all)

Similar Part No. - FM25CL64-GA

Manufacturer	Part #	Datasheet	Description
Ramtron International C...	FM25CL64-S	131Kb / 13P	64Kb FRAM Serial 3V Memory

More results

Similar Description - FM25CL64-GA

Manufacturer	Part #	Datasheet	Description
Ramtron International C...	FM25CL64	131Kb / 13P	64Kb FRAM Serial 3V Memory
	FM24CL64	115Kb / 13P	64Kb Serial 3V FRAM Memory
	FM25640	131Kb / 14P	64Kb FRAM Serial Memory
	FM25640	187Kb / 13P	64Kb FRAM Serial Memory
	FM24C64	98Kb / 12P	64Kb FRAM Serial Memory
	FM25640	138Kb / 13P	64Kb FRAM Serial Memory
List of Unclassifed Man...	FM24CL64	96Kb / 13P	64Kb 2.7V-3.6V FRAM Serial Memory
Ramtron International C...	FM25L512	163Kb / 13P	512Kb FRAM Serial 3V Memory
	FM25L16	146Kb / 14P	16Kb FRAM Serial 3V Memory
	FM25L256B	148Kb / 14P	256Kb FRAM Serial 3V Memory

More results

FM25CL64-GA Datasheet(PDF) 6 Page - Ramtron International Corporation

FM25CL64-GA Datasheet(HTML) 6 Page - Ramtron International Corporation

Similar Part No. - FM25CL64-GA

Similar Description - FM25CL64-GA

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13

Datasheet Download

Link URL