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VRS51L1050-25-P-ISPV3 Datasheet(PDF) 6 Page - Ramtron International Corporation |
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VRS51L1050-25-P-ISPV3 Datasheet(HTML) 6 Page - Ramtron International Corporation |
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6 / 49 page  VRS51L1050 ______________________________________________________________________________________________ www.ramtron.com page 6 of 49 VRS51L1050 Program Memory The VRS51L1050 includes 64KB of on-chip Flash memory that can be used as program memory or as general non-volatile data storage memory using the In- Application Programming (IAP) feature. ISP Boot Program Memory Zone The upper portion of the VRS51L1050 Flash memory can be reserved to store an ISP (In-System Programmable) boot loader program. This boot program can be used to program the Flash memory via the serial interface (or any other method) with the VRS51L1050’s In-Application Programming feature. This allows the processor to load the program from an external device or system and program it into the Flash memory (see the VRS51L1050 IAP feature section). The size of the memory block reserved for the ISP boot loader program (when activated) is adjustable from 512 bytes up to 4KB in increments of 512 bytes. FIGURE3: VRS51L1050-ISP PROGRAM SIZE VS ISP CONFIG. VALUE FFFFh FE00h FC00h FA00h F000h F800h F600h F400h F200h 0000h ISP Program Size = ISP Config value x 512Bytes Programming the ISP Boot Program The ISP boot program must be programmed into the device using a parallel programmer (such as Ramtron’s VERSAMCU-PPR or a commercial programmer that supports the VRS51L1050). The Flash memory reserved for the ISP program is defined by the parallel programmer software at the moment the device is programmed. When programming the ISP boot program into the VRS51L1050, the “lock bit” option should be activated in order to: o Protect the ISP Flash memory zone from being inadvertently erased (this can happen when the Flash Erase operations are performed under the control of the ISP boot program), o Prevent the VRS51L1050 Flash from being read back using a parallel programmer. If an erase operation is performed using a parallel programmer, the entire Flash memory, including the ISP boot program memory zone, will be erased. VRS51L1050 ISPV3 Firmware Boot Program An ISP boot loader program is available for the VRS51L1050 (ISPVx Firmware, x = revision, see Ramtron web site for latest revision). The ISPVx firmware enables In-System-Programming of the VRS51L1050 on the final application PCB using the device’s UART interface. See the following figure for a hardware configuration example (other configurations are also possible). FIGURE 4: VRS51L1050 INTERFACE FOR IN-SYSTEM PROGRAMMING VRS51L1050 RXD TXD RES Creset To PC 150k PNP Rreset (with ISPV3 Firmware) The VRS51L1050 is available with or without the ISPVx boot loader firmware (see ordering information on page 50). The ISPVx boot loader firmware can also be programmed into the VRS51L1050 by the user. Source code is included with Ramtron’s Windows™- based Versa Ware ISP application software, which allows communication with the ISPVx firmware. Visit the Ramtron web site to download the Versa Ware ISP software. For more information on the ISPVx firmware, consult the “Versa Ware ISP - VRS51L1050 ISPVx User Guide.pdf”, also available on the Ramtron web site. |
Similar Part No. - VRS51L1050-25-P-ISPV3 |
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Similar Description - VRS51L1050-25-P-ISPV3 |
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