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CD74HC4049M Datasheet(PDF) 1 Page - Texas Instruments |
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CD74HC4049M Datasheet(HTML) 1 Page - Texas Instruments |
1 / 10 page 1 Data sheet acquired from Harris Semiconductor SCHS205I Features • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25 oC • High-to-Low Voltage Level Converter for up to Vl = 16V • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . –55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V Pinout CD54HC4049, CD54HC4050 (CERDIP) CD74HC4049, CD74HC4050 (PDIP, SOIC, SOP, TSSOP) TOP VIEW Description The ’HC4049 and ’HC4050 are fabricated with high-speed silicon gate technology. They have a modified input protection structure that enables these parts to be usedas logic level translators which convert high-level logic to a low- level logic while operating off the low-level logic supply. For example, 15-V input pulse levels can be down-converted to 0-V to 5-V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. These parts also can be used as simple buffers or inverters without level translation. The ’HC4049 and ’HC4050 are enhanced versions of equivalent CMOS types. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 VCC 1Y 1A 2Y 2A 3Y GND 3A NC 6A NC 5Y 5A 4Y 4A 6Y 4049 4050 4050 4049 VCC 1Y 1A 2Y 2A 3Y GND 3A NC 6A NC 5Y 5A 4Y 4A 6Y Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE CD54HC4049F3A –55 to 125 16 Ld CERDIP CD54HC4050F3A –55 to 125 16 Ld CERDIP CD74HC4049E –55 to 125 16 Ld PDIP CD74HC4049M –55 to 125 16 Ld SOIC CD74HCT4050MT –55 to 125 16 Ld SOIC CD74HC4049M96 –55 to 125 16 Ld SOIC CD74HC4049NSR –55 to 125 16 Ld SOP CD74HC4049PW –55 to 125 16 Ld TSSOP CD74HC4049PWR –55 to 125 16 Ld TSSOP CD74HC4049PWT –55 to 125 16 Ld TSSOP CD74HC4050E –55 to 125 16 Ld PDIP CD74HC4050M –55 to 125 16 Ld SOIC CD74HC4050MT –55 to 125 16 Ld SOIC CD74HC4050M96 –55 to 125 16 Ld SOIC CD74HC4050NSR –55 to 125 16 Ld SOP CD74HC4050PW –55 to 125 16 Ld TSSOP CD74HC4050PWR –55 to 125 16 Ld TSSOP CD74HC4050PWT –55 to 125 16 Ld TSSOP NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250. February 1998 - Revised February 2005 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2005,Texas Instruments Incorporated CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting [ /Title (CD74H C4049, CD74H C4050) /Sub- ject (High Speed CMOS Logic Hex |
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