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PIC18F8621-EPTSQTP Datasheet(PDF) 9 Page - Microchip Technology |
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PIC18F8621-EPTSQTP Datasheet(HTML) 9 Page - Microchip Technology |
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9 / 386 page  2003 Microchip Technology Inc. Advance Information DS39612A-page 7 PIC18F6X2X/8X2X 1.0 DEVICE OVERVIEW This document contains device specific information for the following devices: • PIC18F6525 • PIC18F6621 • PIC18F8525 • PIC18F8621 This family offers the advantages of all PIC18 microcontrollers - namely, high computational performance at an economical price - with the addition of high endurance enhanced FLASH program memory. The PIC18F6X2X/8X2X family also provides an enhanced range of program memory options and versatile analog features that make it ideal for complex, high performance applications. 1.1 Key Features 1.1.1 EXPANDED MEMORY The PIC18F6X2X/8X2X family provides ample room for application code, and includes members with 48 Kbytes or 64 Kbytes of code space. Other memory features are: • Data RAM and Data EEPROM: The PIC18F6X2X/8X2X family also provides plenty of room for application data. The devices have 3840 bytes of data RAM as well as 1024 bytes of data EEPROM for long term retention of non-volatile data. • Memory Endurance: The enhanced FLASH cells for both program memory and data EEPROM are rated to last for many thousands of erase/write cycles - up to 100,000 for program memory, and 1,000,000 for EEPROM. Data retention without refresh is conservatively estimated to be greater than 40 years. 1.1.2 EXTERNAL MEMORY INTERFACE In the unlikely event that 64 Kbytes of program memory is inadequate for an application, the PIC18F8X2X members of the family also implement an external memory interface. This allows the controller’s internal program counter to address a memory space of up to 2 MBytes, permitting a level of data access that few 8-bit devices can claim. With the addition of new operating modes, the external memory interface offers many new options, including: • Operating the microcontroller entirely from external memory • Using combinations of on-chip and external memory, up to the 2-Mbyte limit • Using external FLASH memory for reprogrammable application code or large data tables • Using external RAM devices for storing large amounts of variable data 1.1.3 EASY MIGRATION Regardless of the memory size, all devices share the same rich set of peripherals, allowing for a smooth migration path as applications grow and evolve. The consistent pinout scheme used throughout the entire family also aids in migrating to the next larger device. This is true when moving between the 64-pin members, between the 80-pin members, or even jumping from 64-pin to 80-pin devices. 1.1.4 OTHER SPECIAL FEATURES • Communications: The PIC18F6X2X/8X2X family incorporates a range of serial communication peripherals, including 2 independent enhanced USARTs and a Master SSP module capable of both SPI and I2C (Master and Slave) modes of operation. Also, for PIC18F6X2X/8X2X devices, one of the general purpose I/O ports can be reconfigured as an 8-bit parallel slave port for direct processor to processor communications. • CCP Modules: All devices in the family incorporate two Capture/Compare/PWM (CCP) modules and three enhanced CCP modules to maximize flexibility in control applications. Up to four different time bases may be used to perform several different operations at once. Each of the three ECCPs offer up to four PWM outputs, allowing for a total of 12 PWMs. The ECCPs also offer many beneficial fea- tures, including polarity selection, programmable dead-time, auto shutdown and restart, and Half-Bridge and Full-Bridge Output modes. • Analog Features: All devices in the family feature 10-bit A/D converters with up to 16 input channels, as well as the ability to perform conversions during SLEEP mode and auto-acquisition conversions. Also included are dual analog comparators with programmable input and output configuration, a programmable Low Voltage Detect module, and a Programmable Brown-out Reset module. • Self-programmability: These devices can write to their own program memory spaces under internal software control. By using a bootloader routine located in the protected boot block at the top of program memory, it becomes possible to create an application that can update itself in the field. |
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