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M13S256328A-5BG Datasheet(PDF) 5 Page - Elite Semiconductor Memory Technology Inc.

Part # M13S256328A-5BG
Description  2M x 32 Bit x 4 Banks Double Data Rate SDRAM
Download  47 Pages
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Manufacturer  ESMT [Elite Semiconductor Memory Technology Inc.]
Direct Link  http://www.esmt.com.tw/index.asp
Logo ESMT - Elite Semiconductor Memory Technology Inc.

M13S256328A-5BG Datasheet(HTML) 5 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M13S256328A
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.2
5/47
DC Specifications
Version
Unit
Note
Parameter
Symbol
Test Condition
-5
-
-
Operation Current
(One Bank Active)
IDD0
tRC = tRC (min) tCK = tCK (min)
Active – Precharge
190
mA
-
Operation Current
(One Bank Active)
IDD1
Burst Length = 2 tRC = tRC (min),
CL= 2.5 IOUT = 0mA,
Active-Read- Precharge
230
mA
-
Precharge Power-down
Standby Current
IDD2P
CKE
≤ V
IL(max), tCK = tCK (min),
All banks idle
40
mA
-
Idle Standby Current
IDD2N
CKE
V
IH(min),
CS
VIH(min), tCK = tCK (min)
150
mA
-
Active Power-down Standby
Current
IDD3P
All banks ACT, CKE
V
IL(max),
tCK = tCK (min)
50
mA
-
Active Standby Current
IDD3N
One bank; Active-Precharge, tRC
= tRAS(max),
tCK = tCK (min)
180
mA
-
Operation Current (Read)
IDD4R
Burst Length = 2, CL= 2.5 , tCK =
tCK (min), IOUT = 0Ma
495
mA
-
Operation Current (Write)
IDD4W
Burst Length = 2, CL= 2.5 , tCK =
tCK (min)
450
mA
-
Auto Refresh Current
IDD5
tRC tRFC(min)
350
mA
-
Self Refresh Current
IDD6
CKE
0.2V
8
mA
1
Note 1. Enable on-chip refresh and address counters.
AC Operation Conditions & Timing Specification
AC Operation Conditions
Parameter
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
VIH(AC)
VREF + 0.35
-
V
-
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
VIL(AC)
-
VREF - 0.35
V
-
Input Different Voltage, CLK and CLK inputs
VID(AC)
0.7
VDDQ+0.6
V
1
Input Crossing Point Voltage, CLK and CLK inputs
VIX(AC)
0.5*VDDQ-0.2
0.5*VDDQ+0.2
V
2
Note1. VID is the magnitude of the difference between the input level on CLK and the input on CLK .
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of
the same.
Input / Output Capacitance
(VDD = 2.3V~2.7V, VDDQ =2.3V~2.7V, TA = 25 C
° , f = 1MHz)
Parameter
Symbol
Min
Max
Unit
Input capacitance(A0~A11, BA0~BA1, CKE,
CS , RAS , CAS , WE )
CIN1
1
4
pF
Input capacitance (CLK, CLK )
CIN2
1
5
pF
Data & DQS input/output capacitance
COUT
1
6.5
pF
Input capacitance (DM)
CIN3
1
6.5
pF


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