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HV257 Datasheet(PDF) 6 Page - Supertex, Inc |
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HV257 Datasheet(HTML) 6 Page - Supertex, Inc |
6 / 13 page 6 HV257 R SINK / RSOURCE Ground Isolation (A GND/DGND Isolation) The V DD_BYP ,VDD_BYP ,and VNN_BYP pins are internal. high impedance current. mirror gate nodes, brought out to mantain stable opamp biasing currents in noisy power supply environments. 0.1uF/25V bypass capacitors, added from V PP_BYP pin to VPP , from VDD_BYP pin to V DD , and from VNN_BYP to VNN,will force the high impedance gate nodes to follow fluctuation of power lines. The expected voltages at the V DD_BYP, and VNN_BYP pins are typically 1.5 volts from their respectful power supply. The expected voltage at V PP_BYP is typically 3V below V PP. BYP _VPP HVOpamp VDD VPP BYP _VNN VNN Set by RSOURCE Set by RSINK HVOUT0 BYP _VPP Cap BYP _VNN Cap Current limit Current limit BYP _VDD BYP _VDD Cap To internal biasing 0.1uF / 25V 0.1uF / 25V 0.1uF / 25V HVOpamp HVOUT31 It is important that the A GND pin is connected to a clean ground. The hold capacitors are internally connected to the A GND, and any ground noise will directly couple to the high voltage outputs (with a gain of 72). The analog and digital ground traces on the PCB should be physically separated to reduce digital switching noise degrading the signal to noise performance. DGND LVOpamp AVDD VPP AVNN AGND1 (pins 89, 43) VSIG HVOpamp HVOUT 1R 71R AGND2 (pin 39) EN, A0 -A4 DVDD DVNN DAC External bypass caps: C1 = 0.1 µF / 500V C2, C3, C4, C5 = 0.1 µF / 25V C_hold 10pF C_comp C_comp C2 C1 C4 C3 C5 C6 Single star GND Sample switch |
Similar Part No. - HV257_07 |
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Similar Description - HV257_07 |
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