6

HV257

R

Ground Isolation (A

The V

current. mirror gate nodes, brought out to mantain stable opamp

biasing currents in noisy power supply environments. 0.1uF/25V

bypass capacitors, added from V

to V

nodes to follow fluctuation of power lines. The expected voltages

at the V

are typically 1.5 volts from their

respectful power supply. The expected voltage at V

3V below V

HVOpamp

Current limit

Current limit

To internal biasing

0.1uF / 25V

0.1uF / 25V

0.1uF / 25V

HVOpamp

It is important that the A

The hold capacitors are internally connected to the A

ground noise will directly couple to the high voltage outputs (with

a gain of 72). The analog and digital ground traces on the PCB

should be physically separated to reduce digital switching noise

degrading the signal to noise performance.

LVOpamp

HVOpamp

1R

71R

DAC

External bypass caps:

C1 = 0.1

µF / 500V

C2, C3, C4, C5 = 0.1

µF / 25V

C_hold

10pF

C_comp

C_comp

C2

C1

C4

C3

C5

C6

Single star GND

Sample

switch