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HV513WG Datasheet(PDF) 1 Page - Supertex, Inc

Part # HV513WG
Description  8-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect
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Manufacturer  SUTEX [Supertex, Inc]
Direct Link  http://www.supertex.com
Logo SUTEX - Supertex, Inc

HV513WG Datasheet(HTML) 1 Page - Supertex, Inc

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Supertex inc.
HV513
8-Channel Serial to Parallel Converter with High Voltage
Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect
Features
❑ HVCMOS‚ technology
❑ Operating output voltage of 250V
❑ Low power level shifting from 5V to 250V
❑ Shift register speed 8MHz @ V
DD = 5V
❑ 8 latch data outputs
❑ Output polarity and blanking
❑ CMOS compatible inputs
❑ Output short circuit detect
❑ Output high-Z control
Applications
❏ Piezoelectric transducer driver
❏ Weaving applications
❏ Braille
❏ Printers
❏ MEMs
❏ Displays
Application Diagram
DIN
CLK
DOUT
LE
HiZ
POL
Shift Register
Latches
Output
Controller
Low Voltage
High Voltage
HVOUT1
HVOUT8
High Voltage
Power Supply
Low Voltage
Power Supply
Supertex HV513
DIN
to the next HV513 for cascading the next
Piezo
Element
BL
FPGA
SHORT
8
/
Level
Translators
&
Push-Pull
Output
Buffers
Supertex inc.
· 1235 Bordeaux Drive, Sunnyvale, CA 94089 · Tel: (408) 222-8888 · FAX: (408) 222-4895 · www.supertex.com
B032306
General Description
The HV513 is a low voltage serial to high voltage parallel
converter with 8 high voltage push-pull outputs. This device has
been designed to drive small capacitve loads such as piezoelec-
tric transducers. It can also be used in any application requiring
multiple high voltage outputs, with medium current source and
sink capabilities.
The device consists of an 8-bit shift register, 8 latches, and
control logic to perform the polarity select and blanking of the
outputs. Data is shifted through the shift register on the low to
high transition of the clock. A data output buffer is provided for
cascading devices. Operation of the shift register is not affected
by the LE, BL, POL, or the HI-Z control inputs. Transfer of data
from the shift register to the latch occurs when the LE is high. The
data in the latch is stored when LE is low. A high-Z, HI-Z, pin is
provided to set all the outputs in a high-Z state.
All outputs have short circuit protection that detects if the outputs
have reached the required output state. If output does not track
the required state, then the SHORT pin will be low. This output
will pulse low during the output transistion period under normal
operation; see SC Timing Diagram for details.
All outputs will have a break-before-make circuitry to reduce
cross-over current during output state changes.
The POL, BL, LE, and HI-Z inputs have an internal pull up
resistor.


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