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C8051F331-GM Datasheet(PDF) 5 Page - Silicon Laboratories |
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C8051F331-GM Datasheet(HTML) 5 Page - Silicon Laboratories |
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5 / 216 page  Rev. 1.5 5 C8051F330/1/2/3/4/5 14.3.General Purpose Port I/O ............................................................................... 131 15. SMBus ................................................................................................................... 137 15.1.Supporting Documents ................................................................................... 138 15.2.SMBus Configuration...................................................................................... 138 15.3.SMBus Operation ........................................................................................... 138 15.3.1.Arbitration............................................................................................... 139 15.3.2.Clock Low Extension.............................................................................. 140 15.3.3.SCL Low Timeout................................................................................... 140 15.3.4.SCL High (SMBus Free) Timeout .......................................................... 140 15.4.Using the SMBus............................................................................................ 140 15.4.1.SMBus Configuration Register............................................................... 142 15.4.2.SMB0CN Control Register ..................................................................... 145 15.4.3.Data Register ......................................................................................... 148 15.5.SMBus Transfer Modes.................................................................................. 148 15.5.1.Master Transmitter Mode ....................................................................... 148 15.5.2.Master Receiver Mode ........................................................................... 150 15.5.3.Slave Receiver Mode ............................................................................. 151 15.5.4.Slave Transmitter Mode ......................................................................... 152 15.6.SMBus Status Decoding................................................................................. 152 16. UART0.................................................................................................................... 155 16.1.Enhanced Baud Rate Generation................................................................... 156 16.2.Operational Modes ......................................................................................... 157 16.2.1.8-Bit UART ............................................................................................. 157 16.2.2.9-Bit UART ............................................................................................. 158 16.3.Multiprocessor Communications .................................................................... 158 17. Enhanced Serial Peripheral Interface (SPI0)...................................................... 165 17.1.Signal Descriptions......................................................................................... 166 17.1.1.Master Out, Slave In (MOSI).................................................................. 166 17.1.2.Master In, Slave Out (MISO).................................................................. 166 17.1.3.Serial Clock (SCK) ................................................................................. 166 17.1.4.Slave Select (NSS) ................................................................................ 166 17.2.SPI0 Master Mode Operation ......................................................................... 167 17.3.SPI0 Slave Mode Operation ........................................................................... 169 17.4.SPI0 Interrupt Sources ................................................................................... 169 17.5.Serial Clock Timing......................................................................................... 170 17.6.SPI Special Function Registers ...................................................................... 171 18. Timers.................................................................................................................... 179 18.1.Timer 0 and Timer 1 ....................................................................................... 179 18.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 179 18.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 180 18.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 181 18.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 182 18.2.Timer 2 .......................................................................................................... 187 18.2.1.16-bit Timer with Auto-Reload................................................................ 187 |
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