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CY7C145-55JC Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY7C145-55JC
Description  8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C145-55JC Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY7C145
CY7C144
4
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
..................................... −65°C to +150°C
Ambient Temperature with
Power Applied
.................................................. −55°C to +125°C
Supply Voltage to Ground Potential
.................−0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State
.....................................................−0.5V to +7.0V
DC Input Voltage[5]
..............................................−0.5V to +7.0V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current .................................................... >200 mA
Selection Guide
7C144-15
7C145-15
7C144-25
7C145-25
7C144-35
7C145-35
7C144-55
7C145-55
Maximum Access Time (ns)
15
25
35
55
Maximum Operating
Current (mA)
220
180
160
160
Maximum Standby
Current for ISB1 (mA)
60
40
30
30
Operating Range
Range
Ambient
Temperature
VCC
Commercial
0
°C to +70°C
5V
± 10%
Industrial
−40
°C to +85°C
5V
± 10%
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
7C144-15
7C145-15
7C144-25
7C145-25
Unit
Min.
Max.
Min.
Max.
VOH
Output HIGH Voltage
VCC = Min., IOH = −4.0 mA
2.4
2.4
V
VOL
Output LOW Voltage
VCC = Min., IOL = 4.0 mA
0.4
0.4
V
VIH
Input HIGH Voltage
2.2
2.2
V
VIL
Input LOW Voltage
0.8
0.8
V
IIX
Input Leakage Current
GND < VI < VCC
−10
+10
−10
+10
µA
IOZ
Output Leakage Current
Outputs Disabled, GND < VO < VCC
−10
+10
−10
+10
µA
ICC
Operating Current
VCC = Max., IOUT = 0 mA
Outputs Disabled
Com’l
220
180
mA
Ind
190
ISB1
Standby Current
(Both Ports TTL Levels)
CEL and CER > VIH,
f = fMAX
[7]
Com’l
60
40
mA
Ind
50
ISB2
Standby Current
(One Port TTL Level)
CEL or CER > VIH,
f = fMAX
[7]
Com’l
130
110
mA
Ind
120
ISB3
Standby Current
(Both Ports CMOS Levels)
Both Ports
CE and CER > VCC – 0.2V,
VIN > VCC – 0.2V
or VIN < 0.2V, f = 0
[7]
Com’l
15
15
mA
Ind
30
ISB4
Standby Current
(One Port CMOS Level)
One Port
CEL or CER > VCC – 0.2V,
VIN > VCC – 0.2V or
VIN < 0.2V, Active
Port Outputs, f = fMAX
[7]
Com’l
125
100
mA
Ind
115
Notes:
5.
Pulse width < 20 ns.
6.
TA is the “instant on” case temperature.
7.
fMAX = 1/tRC = All inputs cycling at f = 1/tRC (except output enable). f = 0 means no address or control lines change. This applies only to inputs at CMOS
level standby ISB3.


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