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DESCRIPTION (CONTINUED)

Z

Y

A

TX/RX

LVD Transceiver

SN65LVDM1676

SN65LVDM1677

SLLS430D – NOVEMBER 2000 – REVISED JUNE 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

The intended application of this device and signaling technique is for point-to-point baseband data transmission

over controlled impedance media of approximately 100

Ω. The transmission media may be printed-circuit board

traces, backplanes, or cables. The large number of transceivers integrated into the same substrate along with

the low pulse skew of balanced signaling, allows extremely precise timing alignment of clock and data for

synchronous parallel data transfers. (Note: The ultimate rate and distance of data transfer is dependent upon the

attenuation characteristics of the media, the noise coupling to the environment, and other system

characteristics.)

The SN65LVDM1676 and SN65LVDM1677 are characterized for operation from –40

°C to 85°C.

INPUTS

OUTPUTS

(Y – Z)

TX/RX

A

Y

Z

A

L

NA

Z

Z

H

L

NA

Z

Z

?

L

NA

Z

Z

L

Open circuit

L

NA

Z

Z

H

NA

H

L

L

H

Z

NA

H

H

H

L

Z

(1)

H = high level, L= low level, Z= high impedance, ? = indeterminate

2

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