HT9170B/HT9170D

Rev. 1.10

5

September 24, 2002

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

1

2

3

4

5

6

7

8

9

V D D

R T / G T

E S T

D V

D 3

D 2

D 1

D 0

O E

V P

V N

G S

V R E .

I N H

P W D N

X 1

X 2

V S S

H T 9 1 7 0 B / D

0 . 1 m .

3 0 0 k W

3 . 5 7 9 5 4 5 M H z

1 0 0 k W

1 0 0 k W

0 . 1 m .

T o n e

2 0 p .

2 0 p .

Figure 1. Test circuit

Functional Description

Overview

The HT9170B/D tone decoders consist of three band

pass filters and two digital decode circuits to convert a

tone (DTMF) signal into digital code output.

An operational amplifier is built-in to adjust the input sig-

nal (refer to Figure 2).

The pre-filter is a band rejection filter which reduces the

dialing tone from 350Hz to 400Hz.

The low group filter filters low group frequency signal

output whereas the high group filter filters high group

frequency signal output.

Each filter output is followed by a zero-crossing detector

with hysteresis. When each signal amplitude at the out-

put exceeds the specified level, it is transferred to full

swing logic signal.

When input signals are recognized to be effective, DV

becomes high, and the correct tone code (DTMF) digit is

transferred.

Steering control circuit

The steering control circuit is used for measuring the ef-

fective signal duration and for protecting against drop

out of valid signals. It employs the analog delay by exter-

nal RC time-constant controlled by EST.

The timing is shown in Figure 3. The EST pin is normally

low and draws the RT/GT pin to keep low through dis-

charge of external RC. When a valid tone input is de-

tected, EST goes high to charge RT/GT through RC.

(2.35V for 5V supply), the input signal is effective, and

the correct code will be created by the code detector. Af-

ter D0~D3 are completely latched, DV output becomes

high. When the voltage of RT/GT falls down from VDD to

comes low, and D0~D3 keeps data until a next valid

tone input is produced.

By selecting adequate external RC value, the minimum ac-

components (R, C) are chosen by the formula (refer to Fig-

ure 5.):

where

²L²®²H²)

²H²®²L²)

V N

G S

V R E .

H T 9 1 7 0 B / D

C

R 1

R .

( a ) S t a n d a r d i n p u t c i r c u i t

V P

V N

G S

V R E .

C 2

R 2

R 5

( b ) D i f f e r e n t i a l i n p u t c i r c u i t

V P

R 4

R 3

C 1

R 1

H T 9 1 7 0 B / D

Figure 2. Input operation for amplifier application circuits