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S1D15E06D01E000 Datasheet(PDF) 11 Page - Epson Company |
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S1D15E06D01E000 Datasheet(HTML) 11 Page - Epson Company |
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11 / 74 page  S1D15E06 Series 8 EPSON Rev. 2.1 P/S Data/Command Data Read/Write Serial clock HIGH A0 D0 to D7 RD, WR LOW A0 SI (D7) Write only SCL (D6) 5.3 System Bus Connection Pin Pin name I/O Description Number of pins D7 to D0 I/O Connects to the 8-bit or 16-bit MPU data bus via the 8-bit 8 bi-directional data bus. (SI) When the serial interface is selected (P/S = LOW), D7 serves as the (SCL) serial data input (SI) and D6 serves as the serial clock input (SCL), In this case, D0 through D5 go to a high impedance state. When the Chip select is inactive, D0 through D7 go to a high impedance state. A0 I Normally, the least significant bit MPU address bus is connected 1 to distinguish between data and command. A0 = HIGH : indicates that D0 to D7 are display data or command parameters. A0 = LOW : indicates that D0 to D7 are control commands. RES I When the RES is LOW, initialization is achieved. 1 Resetting operation is done on the level of the RES signal. CS1 I A chip select signal. When CS1 = LOW and CS2 = HIGH, signals 2 CS2 are active, and data/command input/output are enabled. RD I • When the 80 series MPU is connected. 1 (E) A pin for connection of the RD signal of the 80 series MPU. When this signal is LOW, the data bus of the S1D15E06 series is in the output state. • When the 68 series MPU is connected. Serves as a 68 series MPU enable clock input pin. WR I • When the 80 series MPU is connected. 1 (R/W) A pin for connection of the WR signal of the 80 series MPU. Signals on the data bus are latched at the leading edge of the WR signal. • Serves as a read/write control signal input pin when the 68 series MPU is connected. R/W = HIGH : Read R/W = LOW : Write C86 I A MPU interface switching pin. 1 C86 = HIGH : 68 series MPU interface C86 = LOW : 80 series MPU interface P/S I Parallel data input/serial data input select pin 1 P/S = HIGH : Parallel data input P/S = LOW : Serial data input The following Table shows the summary: When P/S = LOW, D0 to D5 are high impedance. D0 to D5 can be HIGH, LOW or open. RD(E) and WR(R/W) are locked to HIGH or LOW. The serial data input does not allow the RAM display data to be read. |
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