ASAHI KASEI

[AK5366VR]

MS0526-E-00

2006/07

- 11 -

SWITCHING CHARACTERISTICS

(Ta=

−40 ∼ 85°C; AVDD=4.75 ∼ 5.25V; DVDD, TVDD=3.0 ∼ 5.25V; C

Parameter

Symbol

min

typ

max

Units

Master Clock Timing

Frequency

Pulse Width Low

Pulse Width High

AC Pulse Width

(Note 19)

fCLK

tCLKL

tCLKH

tACW

8.192

0.3/fCLK

0.3/fCLK

0.4/fCLK

24.576

MHz

ns

ns

ns

LRCK Frequency

Frequency

fsn

32

48

kHz

Duty Cycle

Slave mode

Master mode

45

50

55

%

%

Audio Interface Timing

Slave mode

BICK Period

BICK Pulse Width Low

Pulse Width High

LRCK Edge to BICK “

↑”

(Note 20)

BICK “

↑” to LRCK Edge

(Note 20)

LRCK to SDTO (MSB) (Except I

BICK “

↓” to SDTO

tBCK

tBCKL

tBCKH

tLRB

tBLR

tLRS

tBSD

160

65

65

30

30

35

35

ns

ns

ns

ns

ns

ns

ns

Master mode

BICK Frequency

BICK Duty

BICK “

↓” to LRCK

BICK “

↓” to SDTO

fBCK

dBCK

tMBLR

tBSD

−20

−20

64fs

50

20

35

Hz

%

ns

ns

Note 19. Pulse width to ground level when MCLK is connected to a capacitor in series and a resistor is connected to

ground.

Note 20. BICK rising edge must not occur at the same time as LRCK edge.