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T4312816B-6S Datasheet(PDF) 4 Page - Taiwan Memory Technology

Part # T4312816B-6S
Description  8M x 16 SDRAM 2M x 16bit x 4Banks Synchronous DRAM
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Manufacturer  TMT [Taiwan Memory Technology]
Direct Link  http://www.tmtech.com.tw
Logo TMT - Taiwan Memory Technology

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TE
CH
tm
T4312816B
TM Technology Inc. reserves the right
P. 4
Publication Date: FEB. 2007
to change products or specifications without notice.
Revision: A
Operation Mode
Fully synchronous operations are performed to latch the commands at the positive edges of CLK. Table 2 shows
the truth table for the operation commands.
Table 2. Truth Table (Note (1), (2) )
Command
State
CKEn-1 CKEn DQM BA0,1 A10
A0-9,11 CS# RAS# CAS# WE#
BankActivate
Idle(3)
H
X
X
V
Row address
L
L
H
H
BankPrecharge
Any
H
X
X
V
L
X
L
L
H
L
PrechargeAll
Any
H
X
X
X
H
X
L
L
H
L
Write
Active(3)
H
X
X
V
L
L
H
L
L
Write and AutoPrecharge
Active(3)
H
X
X
V
H
Column
address (A0
~ A8)
L
H
L
L
Read
Active(3)
H
X
X
V
L
L
H
L
H
Read and Autoprecharge
Active(3)
H
X
X
V
H
Column
address (A0
~ A8)
L
H
L
H
Mode Register Set
Idle
H
X
X
OP code
L
L
L
L
No-Operation
Any
H
X
X
X
X
X
L
H
H
H
Burst Stop
Active(4)
H
X
X
X
X
X
L
H
H
L
Device Deselect
Any
H
X
X
X
X
X
H
X
X
X
AutoRefresh
Idle
H
H
X
X
X
X
L
L
L
H
SelfRefresh Entry
Idle
H
L
X
X
X
X
L
L
L
H
SelfRefresh Exit
Idle
H
X
X
X
(SelfRefresh)
L
H
X
X
X
X
L
H
H
H
Clock Suspend Mode Entry
Active
H
L
X
X
X
X
X
X
X
X
Power Down Mode Entry
Any(5)
H
X
X
X
H
L
X
X
X
X
L
H
H
H
Clock Suspend Mode Exit
Active
L
H
X
X
X
X
X
X
X
X
Power Down Mode Exit
Any
L
H
X
X
X
X
H
X
X
X
(PowerDown)
L
H
H
H
Data Write/Output Enable
Active
H
X
L
X
X
X
X
X
X
X
Data Mask/Output Disable
Active
H
X
H
X
X
X
X
X
X
X
Note:
1. V=Valid X=Don't Care L=Low level H=High level
2. CKEn signal is input level when commands are provided.
CKEn-1 signal is input level one clock cycle before the commands are provided.
3. These are states of bank designated by BS signal.
4. Device state is 1, 2, 4, 8, and full page burst operation.
5. Power Down Mode can not enter in the burst operation.
When this command is asserted in the burst cycle, device state is clock suspend mode.


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