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MC12149D Datasheet(PDF) 5 Page - LANSDALE Semiconductor Inc. |
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MC12149D Datasheet(HTML) 5 Page - LANSDALE Semiconductor Inc. |
5 / 12 page www.lansdale.com Page 5 of 12 LANSDALE Semiconductor, Inc. ML12149 the capacitance value. To simplify the selection of C1 and Cb, a table has been constructed based on the intended operating fre- quency to provide recommended starting points. These may need to be altered depending on the value of the varactor selected. The value of the Cb capacitor influences the VCO supply push- ing. To minimize pushing, the Cb capacitor should be kept small. Since C1 is in series with the varactor, there is a strong relation- ship between these two components which influences the VCO sensitivity. Increasing the value of C1 tends to increase the sensi- tivity of the VCO. The parasitic contributions Lp and Cp are related to the ML12149 as well as parasitics associated with the layout, tank components, and board material selected. The input capacitance of the device, bond pad, the wire bond, package/lead capacitance, wire bond inductance, lead inductance, printed circuit board lay- out, board dielectric, and proximity to the ground plane all have an impact on these parasitics. For example, if the ground plane is located directly below the tank components, a parasitic capacitor will be formed consisting of the solder pad, metal traces, board dielectric material, and the ground plane. The test fixture used for characterizing the device consisted of a two sided copper clad board with ground plane on the back. Nominal values where determined by selecting a varactor and characterizing the device with a number of different tank/frequency combinations and then performing a curve fit with the data to determine values for Lp and Cp. The nominal values for the parasitic effects are seen below: These values will vary based on the users unique circuit board configuration. Basic Guidelines: 1. Select a varactor with high Q and a reasonable capacitance versus voltage slope for the desired frequency range. 2. Select the value of Cb and C1 from the table above. 3. Calculate a value of inductance (L) which will result in achieving the desired center frequency. Note that L includes both LT and Lp. 4. Adjust the value of C1 to achieve the proper VCO sensitivity. 5. Re–adjust value of L to center VCO. 6. Prototype VCO design using selected components. It is important to use similar construction techniques and materials, board thickness, layout, ground plane spacing as intended for the final product. 7. Characterize tuning curve over the voltage operation conditions. 8. Adjust, as necessary, component values – L, C1, and Cb to compensate for parasitic board effects. 9. Evaluate over temperature and voltage limits. 10. Perform worst case analysis of tank component variation to insure proper VCO operation over full temperature and voltage range and make any adjustments as needed. Outputs Q and QB are open collector outputs and need a induc- tor to VCC to provide the voltage bias to the output transistor. In most applications, DC–blocking capacitors are placed in series with the output to remove the DC component before interfacing to other circuitry. These outputs are complementary and should have identical inductor values for each output. This will minimize switching noise on the VCC supply caused by the outputs switch- ing. It is important that both outputs be terminated, even if only one of the outputs is used in the application. Referring to Figure 2, the recommended value for L2a and L2b should be 47 nH and the inductor components resonance should be at least 300 MHz greater than the maximum operating frequen- cy. For operation above 1100MHz, it may be necessary to reduce that inductor value to 33nH. The recommended value for the cou- pling capacitors C6a, C6b, and C7 is 47 pF. Figure 2 also includes decoupling capacitors for the supply line as well as decoupling for the output inductors. Good RF decoupling practices should be used with a series of capacitors starting with high quality 100pF chip capacitors close to the device. A typical layout is shown below in Figure 3. The output amplitude of the Q and QB can be adjusted using the CNTL pin. Refering to Figure 1, if the CNTL pin is connected to ground, additional current will flow through the current source. When the pin is left open, the nominal current flowing through the outputs is 4 mA. When the pin is grounded, the current increases to a nominal value of 10 mA. So if a 50 ohm resistor was connected between the outputs and VCC, the output ampli- tude would change from 200 mV pp to 500 mV pp with an addi- tional current drain for the device of 6 mA. To select a value between 4 and 10 mA, an external resistor can be added to ground. The equation below is used to calculate the current. Figure 4 through Figure 13 illustrate typical performance achieved with the ML12149. The curves illustrate the tuning curve, supply pushing characteristics, output power, current drain, output spectrum, and phase noise performance. In most cases, data is present for both a 750 MHz and1200 MHz tank design. The table below illustrates the component values used in the designs. Frequency C1 Cb 200 – 500 MHz 47 pF 47 pF 500 – 900 MHz 5.1 pF 15 pF 900 – 1200 MHz 2.7 pF 15 pF Parasitic Capacitance Parasitic Inductance Cp Lp 4.2 pF 2.2 nH I= out(nom) (200 + x+ +x 136 Rext)0.8V 200 (136 Rext) Component 750MHz Tank 1200MHz Tank Units R1 5000 5000 Ω C1 5.1 2.7 pF LT 4.7 1.8 nH CV 3.7 @ 1.0 V 11 @ 4.0 V 3.7 @ 1.0 V 11 @ 4.0 V pF Cb 100* 15 pF C6, C7 47 33 pF L2 47 47 nH NOTE: * The value of Cb should be reduced to minimize pushing. Legacy Applications Information Issue B |
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