Internet Data Sheet

Rev. 1.1, 2007-02

9

09072006-N4GC-EREN

HY[B/I]39SC128[800/160]FE

128-MBit Synchronous DRAM

TABLE 5

TABLE 6

Burst Length and Sequence

Field

Bits

Type

Description

BL

[2:0]

w

Burst Length

Number of sequential bits per DQ related to one read/write command, see

Table 6.

Note: All other bit combinations are RESERVED

BT

3

Burst Type

Sequential

Interleaved

CL

[6:4]

CAS Latency

Number of full clocks from read command to first data valid window.

Note: All other bit combinations are RESERVED.

TM

[8:7]

Test Mode

Note: All other bit combinations are RESERVED.

WBL

9

Write Burst Length

Burst write

Single bit write

—

[12:10]

Reserved, set to zero

Burst Length

Starting Column Address

Order of Accesses Within a Burst

A2

A1

A0

Type=Sequential

Type=Interleaved

2

——0

0–1

0–1

—

—1

1–0

1–0