EVAL-AD7470_07 datasheet(5/20 Pages) AD

Part #	EVAL-AD7470

Description	Evaluation Board for 10-/12-Bit High Speed, Low Power ADCs

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EVAL-AD7470/AD7472

Rev. C | Page 5 of 20

EVAL-CONTROL BRD2 INTERFACING

Interface to the EVAL-CONTROL BRD2 via a 96-way

connector, J1. The pinout for the J1 connector is shown in

Figure 2 and its pin designations are given in Table 4.

1

32

1

32

A

B

C

Figure 2. Pin Configuration for the 96-Way Connector, J1

Table 3. 96-Way Connector Pin Description

Signal

Description

D0 to

D11

Data Bit 0 to Data Bit 11. Three-state TTL outputs. D11

is the MSB.

SCLK0

Serial Clock Zero. This continuous clock can be

connected to the CLKIN pin of the AD7470/AD7472

via LK3.

+5VD

Digital +5 V supply. This can be used to provide a

separate +5 V supply for the digital logic if required

via LK2.

RD

Read. This is an active low logic input connected to the

RD pin of the AD7470/AD7472 via LK5.

CS

Chip Select. This is an active low logic input connected

to the CS pin of the AD7470/AD7472 via LK6.

FL0

Flag Zero. This logic input is connected to the CONVST

input of the AD7470/AD7472 via LK4.

IRQ2

Interrupt Request 2. This is a logic output and is

connected to the BUSY logic output on the

AD7470/AD7472.

DGND

Digital Ground. These lines are connected to the

digital ground plane on the evaluation board. It

allows the user to provide the digital supply via

the connector along with the other digital signals.

AGND

Analog Ground. These lines are connected to the

analog ground plane on the evaluation board.

AVSS

Negative Supply Voltage. This provides a negative

supply to the on-board op amps via LK9.

AVDD

Positive Supply Voltage. This provides a positive

supply to the op amps, the reference, the

AD7470/AD7472, and the digital logic.

Table 4. 96-Way Connector Pin Functions1

Row A

Row B

Row C

1

2

D0

3

D1

4

DGND

5

D2

6

D3

7

SCLK0

D4

SCLK0

8

+5VD

9

RD

D5

10

D6

CS

11

D7

12

DGND

13

D8

14

D9

15

D10

16

DGND

17

FL0

D11

IRQ2

18

19

20

DGND

21

AGND

22

AGND

23

AGND

24

AGND

25

AGND

26

AGND

27

AGND

28

AGND

29

AGND

30

AGND

31

AVSS

32

AVDD

1The unused pins of the 96-way connector are not shown.

While the AD7470/AD7472 data sheet specifies a maximum

clock frequency of 30 MHz and 26 MHz for the parts, the

DSP and the on-board crystal oscillator output a 20 MHz and

25 MHz clock, respectively. Therefore, the maximum sampling

frequency is less than specified on the data sheet. An external

clock frequency (up to the maximum specified on the data

sheet) can be applied via the external socket, SK1.

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