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HYS72D64320HBR-6-C Datasheet(PDF) 10 Page - Qimonda AG |
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HYS72D64320HBR-6-C Datasheet(HTML) 10 Page - Qimonda AG |
10 / 50 page Internet Data Sheet Rev. 1.32, 2007-03 10 03292006-Q22P-G7TH HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C Registered Double Data Rate SDRAM FIGURE 1 Pin Configuration 184 Pins, Reg TABLE 7 Address Table Density Organization Memory Ranks SDRAMs # of SDRAMs # of row/rank/ columns bits Refresh Period Interval 256 MB 32 M ×72 1 32 M ×8 9 13 / 2 / 10 8 K 64 ms 7.8 µs 512 MB 64 M ×72 1 64 M ×4 18 13 / 2 / 11 8 K 64 ms 7.8 µs 512 MB 64 M ×72 2 32 M ×8 18 13 / 2 / 10 8 K 64 ms 7.8 µs 1GB 128 M ×72 2 64 M ×4 36 13 / 2 / 11 8 K 64 ms 7.8 µs |
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