Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

TLC3544 Datasheet(PDF) 4 Page - Texas Instruments

Click here to check the latest version.
Part # TLC3544
Description  5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
Download  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLC3544 Datasheet(HTML) 4 Page - Texas Instruments

  TLC3544 Datasheet HTML 1Page - Texas Instruments TLC3544 Datasheet HTML 2Page - Texas Instruments TLC3544 Datasheet HTML 3Page - Texas Instruments TLC3544 Datasheet HTML 4Page - Texas Instruments TLC3544 Datasheet HTML 5Page - Texas Instruments TLC3544 Datasheet HTML 6Page - Texas Instruments TLC3544 Datasheet HTML 7Page - Texas Instruments TLC3544 Datasheet HTML 8Page - Texas Instruments TLC3544 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 42 page
background image
TLC3544, TLC3548
5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL
ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
SLAS266C – OCTOBER 2000 – REVISED MAY 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NAME
NO.
I/O
DESCRIPTION
NAME
TLC3544
TLC3548
I/O
DESCRIPTION
EOC(INT)
4
4
O
End of conversion (EOC) or interrupt to host processor (INT)
EOC: used in conversion mode 00 only. EOC goes from high to low at the end of the sampling and
remains low until the conversion is complete and data is ready.
INT: Interrupt to the host processor. The falling edge of INT indicates data is ready for output. INT
is cleared by the following CS
↓, FS↑, or CSTART↓.
FS
2
2
I
Frame sync input from DSP. The rising edge of FS indicates the start of a serial data frame being
transferred (coming into or being sent out of the device). If FS is low at the falling edge of CS, the
rising edge of FS initiates the operation cycle, resets the internal 4-bit counter, and enables SDI,
SDO, and SCLK. Tie this pin to DVDD if FS is not used to initiate the operation cycle.
REFM
16
20
I
External low reference input. Connect REFM to AGND.
REFP
15
19
I
External positive reference input. When an external reference is used, the range of maximum input
voltage is determined by the difference between the voltage applied to this terminal and to the
REFM terminal. Always install decoupling capacitors (10
µF in parallel with 0.1 µF) between REFP
and REFM.
SCLK
1
1
I
Serial clock input from the host processor to clock in the input from SDI and clock out the output
via SDO. It can also be used as the conversion clock source when the external conversion clock
is selected (see Table 2). When CS is low, SCLK is enabled. When CS is high, SCLK is disabled
for the data transfer, but can still work as the conversion clock source.
SDI
3
3
I
Serial data input. The first 4 MSBs, ID[15:12], are decoded as one 4-bit command. All trailing bits,
except for the CONFIGURE WRITE command, are filled with zeros. The CONFIGURE WRITE
command requires additional 12-bit data. The MSB of input data, ID[15], is latched at the first falling
edge of SCLK following FS falling edge, if FS starts the operation, or latched at the falling edge of
first SCLK following CS falling edge when CS initiates the operation.
The remaining input data (if any) is shifted in on the rising edge of SCLK and latched on the falling
edge of SCLK. The input via SDI is ignored after the 4-bit counter counts to 16 (clock edges) or a
low-to-high transition of CS, whichever happens first. Refer to the timing specification for the timing
requirements. Tie SDI to DVDD if using hardware default mode (refer to device initialization).
SDO
5
5
O
The 3-state serial output for the A/D conversion result. All data bits are shifted out through SDO.
SDO is in the high-impedance state when CS is high. SDO is released after a CS falling edge. The
output format is MSB (OD[15]) first.
When FS initiates the operation, the MSB of output via SDO, OD[15], is valid before the first falling
edge of SCLK following the falling edge of FS.
When CS initiates the operation, the MSB, OD[15], is valid before the first falling edge of SCLK
following the CS falling edge.
The remaining data bits are shifted out on the rising edge of SCLK and are valid before the falling
edge of SCLK. Refer to the timing specification for the details.
In a select/conversion operation, the first 14 bits are the results from the previous conversion (data).
In READ FIFO operation, the data is from FIFO. In both cases, the last two bits are don’t care.
In a WRITE operation, the output from SDO is ignored.
SDO goes into high-impedance state at the sixteenth falling edge of SCLK after the operation cycle
is initiated. SDO is in high-impedance state during conversions in modes 01, 10, and 11.


Similar Part No. - TLC3544

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
TLC3544 TI-TLC3544 Datasheet
790Kb / 40P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
TLC3544CDW TI-TLC3544CDW Datasheet
790Kb / 40P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
TLC3544CDWR TI-TLC3544CDWR Datasheet
790Kb / 40P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
TLC3544CDWRG4 TI-TLC3544CDWRG4 Datasheet
790Kb / 40P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
TLC3544CPW TI-TLC3544CPW Datasheet
790Kb / 40P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
More results

Similar Description - TLC3544

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
TLC3544 TI-TLC3544 Datasheet
790Kb / 40P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
TLC2574 TI-TLC2574 Datasheet
706Kb / 39P
[Old version datasheet]   5-V ANALOG 3-/5-V DIGITAL 14-/12-BIT 200-KSPS 4-/8-CHANNEL SERIAL ANALOG TO DIGITAL CONVERTERS WITH 10-V INPUTS
TLC3574IDW TI-TLC3574IDW Datasheet
1Mb / 49P
[Old version datasheet]   5-V ANALOG,3-/5-V DIGITAL, 14-/12-BIT, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 10-V INPUTS
TLC2578IDW TI1-TLC2578IDW Datasheet
1Mb / 49P
[Old version datasheet]   5-V ANALOG,3-/5-V DIGITAL, 14-/12-BIT, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WIRH 10-V INPUTS
TLC2578IDWR TI-TLC2578IDWR Datasheet
1Mb / 49P
[Old version datasheet]   5-V ANALOG 3-5V DIGITAL 14-12BIT 200-KSPS 4-8CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH
TLC3541 TI-TLC3541 Datasheet
481Kb / 23P
[Old version datasheet]   5-V. LOW POWER, 14-BIT, 200-KSPS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO-POWER DOWN
TLC4545ID TI1-TLC4545ID Datasheet
805Kb / 26P
[Old version datasheet]   5-V, LOW POWER, 16-BIT, 200-KSPS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO-POWER DOWN
TLC4541 TI-TLC4541 Datasheet
341Kb / 21P
[Old version datasheet]   5-V, LOW POWER, 16-BIT, 200-KSPS SERIAL ANALOG TO DIGITAL CONVERTERS WITH AUTO POWER DOWN
TLC2551 TI-TLC2551 Datasheet
365Kb / 23P
[Old version datasheet]   5 V, LOW POWER, 12-BIT, 400 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN
TLC4541 TI1-TLC4541_14 Datasheet
840Kb / 28P
[Old version datasheet]   5-V LOW POWER, 16-BIT, 200-KSPS SEREAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO-POWER DOWN
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com