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Internet Data Sheet Rev. 1.43, 2006-11 3 03292006-L40N-L04G HYB18T512161BF–20/22/25/28/33 512-Mbit Double-Data-Rate-Two SDRAM 1Overview This chapter gives an overview of the 512-Mbit Double-Data-Rate-Two SDRAM product family for graphics application and describes its main characteristics. 1.1 Features The 512-Mbit Double-Data-Rate-Two SDRAM offers the following key features: • 1.8 V ± 0.1V V DD for [–25/–28/–33] • 2.0 V ± 0.1V V DD for [–20/–22] • 1.8 V ± 0.1V V DDQ for [–25/–28/–33] • 2.0 V ± 0.1V V DDQ for [–20/–22] • DRAM organizations with 16 data in/outputs • Double Data Rate architecture: – two data transfers per clock cycle – four internal banks for concurrent operation • Programmable CAS Latency: 3, 4, 5, 6, 7 • Programmable Burst Length: 4 and 8 • Differential clock inputs (CK and CK) • Bi-directional, differential data strobes (DQS and DQS) are transmitted / received with data. Edge aligned with read data and center-aligned with write data. • DLL aligns DQ and DQS transitions with clock •DQS can be disabled for single-ended data strobe operation • Commands entered on each positive clock edge, data and data mask are referenced to both edges of DQS • Data masks (DM) for write data • Posted CAS by programmable additive latency for better command and data bus efficiency • Off-Chip-Driver impedance adjustment (OCD) and On- Die-Termination (ODT) for better signal quality. • Auto-Precharge operation for read and write bursts • Auto-Refresh, Self-Refresh and power saving Power- Down modes • Average Refresh Period 7.8 µs at a T CASE lower than 85 °C, 3.9 µs between 85 °C and 95 °C • Full Strength and reduced Strength (60%) Data-Output Drivers • 2kB page size • Packages: P-TFBGA-84 for ×16 components • RoHS Compliant Products1) TABLE 1 Ordering Information for RoHS compliant products 1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. Product Number Org. Clock (MHz) Package HYB18T512161BF–20/22/25/28/33 ×16 500/450/400/350/300 P-TFBGA-84 |
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| Part Number | Components Description | Html View | Manufacturer |
| HYB18T512161B2F | 512-Mbit x16 DDR2 SDRAM | 1 2 3 4 5 More | Qimonda AG |
| HYB18T512400AF | 512-Mbit DDR2 SDRAM | 1 2 3 4 5 More | Infineon Technologies AG |
| HY5PS1G431CFP | 1Gb DDR2 SDRAM | 1 2 3 4 5 More | Hynix Semiconductor |
| HYB18T512400AF | 512-Mbit Double-Data-Rate-Two SDRAM | 1 2 3 4 5 More | Qimonda AG |
| HY5PS1G831F | 1Gb DDR2 SDRAM | 1 2 3 4 5 More | Hynix Semiconductor |
| HYB18T512400B2C | 512-Mbit Double-Data-Rate-Two SDRAM | 1 2 3 4 5 More | Qimonda AG |
| HYB18T512400B | 512-Mbit Double-Data-Rate-Two SDRAM | 1 2 3 4 5 More | Qimonda AG |
| HYB18T512400BF | 512-Mbit Double-Data-Rate-Two SDRAM | 1 2 3 4 5 More | Qimonda AG |
| HYB25D512800BT | 512-Mbit Double-Data-Rate SDRAM | 1 2 3 4 5 More | Qimonda AG |
| HYB25DC512800B | 512-Mbit Double-Data-Rate SDRAM | 1 2 3 4 5 More | Qimonda AG |
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