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HYB18L128160BC-7.5 Datasheet(PDF) 10 Page - Qimonda AG |
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HYB18L128160BC-7.5 Datasheet(HTML) 10 Page - Qimonda AG |
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10 / 55 page  Data Sheet 10 Rev. 1.71, 2007-01 05282004-NZNK-8T0D HY[B/E]18L128160B[C/F]-7.5 128-Mbit Mobile-RAM Functional DescriptionRegister Definition 2.2.1.1 Burst Length READ and WRITE accesses to the Mobile-RAM are burst oriented, with the burst length being programmable. The burst length determines the maximum number of column locations that can be accessed for a given READ or WRITE command. Burst lengths of 1, 2, 4, 8 locations are available for both the sequential and interleaved burst types, and a full-page burst mode is available for the sequential burst type. When a READ or WRITE command is issued, a block of columns equal to the burst length is effectively selected. All accesses for that burst take place within this block, meaning that the burst wraps within the block if a boundary is reached. The block is uniquely selected by A1-A8 when the burst length is set to two, by A2-A8 when the burst length is set to four and by A3-A8 when the burst length is set to eight. The remaining (least significant) address bit(s) is (are) used to select the starting location within the block. Full page bursts wrap within the page if the boundary is reached. Please note that full page bursts do not self- terminate; this implies that full-page read or write bursts with Auto Precharge are not legal commands. NotesNotes 1. For a burst length of 2, A1-Ai select the two-data-element block; A0 selects the first access within the block. 2. For a burst length of 4, A2-Ai select the four-data-element block; A0-A1 select the first access within the block. 3. For a burst length of 8, A3-Ai select the eight-data-element block; A0-A2 select the first access within the block. 4. For a full page burst, A0-Ai select the starting data element. BL [2:0] w Burst Length 000B 1 001B 2 010B 4 011B 8 111B full page (Sequential burst type only) Note: All other bit combinations are RESERVED. Table 6 Burst Definition Burst Length Starting Column Address Order of Accesses Within a Burst A2 A1 A0 Sequential Interleaved 2 0 0 - 1 0 - 1 1 1 - 0 1 - 0 4 0 0 0 - 1 - 2 - 3 0 - 1 - 2 - 3 0 1 1 - 2 - 3 - 0 1 - 0 - 3 - 2 1 0 2 - 3 - 0 - 1 2 - 3 - 0 - 1 1 1 3 - 0 - 1 - 2 3 - 2 - 1 - 0 8 0 0 0 0 - 1 - 2 - 3 - 4 - 5 - 6 - 7 0 - 1 - 2 - 3 - 4 - 5 - 6 - 7 0 0 1 1 - 2 - 3 - 4 - 5 - 6 - 7 - 0 1 - 0 - 3 - 2 - 5 - 4 - 7 - 6 0 1 0 2 - 3 - 4 - 5 - 6 - 7 - 0 - 1 2 - 3 - 0 - 1 - 6 - 7 - 4 - 5 0 1 1 3 - 4 - 5 - 6 - 7 - 0 - 1 - 2 3 - 2 - 1 - 0 - 7 - 6 - 5 - 4 1 0 0 4 - 5 - 6 - 7 - 0 - 1 - 2 - 3 4 - 5 - 6 - 7 - 0 - 1 - 2 - 3 1 0 1 5 - 6 - 7 - 0 - 1 - 2 - 3 - 4 5 - 4 - 7 - 6 - 1 - 0 - 3 - 2 1 1 0 6 - 7 - 0 - 1 - 2 - 3 - 4 - 5 6 - 7 - 4 - 5 - 2 - 3 - 0 - 1 1 1 1 7 - 0 - 1 - 2 - 3 - 4 - 5 - 6 7 - 6 - 5 - 4 - 3 - 2 - 1 - 0 Full Page n n n Cn, Cn+1, Cn+2, … not supported Field Bits Type Description |
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