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Internet Data Sheet Rev. 1.1, 2006-11 3 03292006-WK9O-3A6G HYS72T512[0/1]22HFN–3.7–A 1Overview This chapter describes the main characteristics of the 240-Pin Fully-Buffered DDR2 SDRAM Modules product family. 1.1 Features • 240-pin Fully-Buffered ECC Dual-In-Line DDR2 SDRAM Module for PC, Workstation and Server main memory applications. • Module organisation two ranks 512M ×72 • JEDEC Standard Double Data Rate 2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8 V ( ± 0.1 V) power supply. • 4GB Module built with 1Gb Dual Die DDR2 SDRAMs in 71- ball FBGA Common Package. • Re-drive and re-sync of all address, command, clock and data signals using AMB (Advanced Memory Buffer). • High-Speed Differential Point-to-Point Link Interface at 1.5 V (Jedec standard pending). • Host Interface and AMB component industry standard compliant. • Supports SMBus protocol interface for access to the AMB configuration registers. • Detects errors on the channel and reports them to the host memory controller. • Automatic DDR2 DRAM Bus Calibration. • Automatic Channel Calibration. • Full Host Control of the DDR2 DRAMs. • Over-Temperature Detection and Alert. • Hot Add-on and Hot Remove Capability. • MBIST and IBIST Test Functions. • Transparent Mode for DRAM Test Support. • Low profile: 133.35mm × 30.35 mm • 240 Pin gold plated card connector with 1.00mm contact centers (JEDEC standard pending). • Based on JEDEC standard reference card designs (Jedec standard pending). • SPD (Serial Presence Detect) with 256 Byte serial E2PROM.Performance: • RoHS Compliant Products1) TABLE 1 Performance for DDR2–533 1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. Product Type Speed Code –3.7 Unit Speed Grade PC2–4200 4–4–4 — max. Clock Frequency @CL5 f CK5 266 MHz @CL4 f CK4 266 MHz @CL3 f CK3 200 MHz min. RAS-CAS-Delay t RCD 15 ns min. Row Precharge Time t RP 15 ns min. Row Active Time t RAS 45 ns min. Row Cycle Time t RC 60 ns |
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| Part Number | Components Description | Html View | Manufacturer |
| HYS72T512420EFA | 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products | 1 2 3 4 5 More | Qimonda AG |
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| HYB18T512161B2F | 512-Mbit x16 DDR2 SDRAM | 1 2 3 4 5 More | Qimonda AG |
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