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SN65LVDS104PWR Datasheet(PDF) 9 Page - Texas Instruments |
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SN65LVDS104PWR Datasheet(HTML) 9 Page - Texas Instruments |
9 / 26 page www.ti.com Y Z 49.9 Ω ± 1% (2 Places) VOC VO VOC(PP) VOC(SS) 0 V A 3 V CL = 10 pF (2 Places) (see Note B) Input (see Note A) Y Z VOD Input (see Note A) CL = 10 pF (2 Places) (see Note B) 100 Ω ± 1% 3 V 1.5 V 0 V tPLH tPHL 100% 80% 20% 0% Input Output 0 V tf tr VOD(H) VOD(L) VIA SN65LVDS104 SN65LVDS105 SLLS396F – SEPTEMBER 1999 – REVISED JANUARY 2005 A. All input pulses are supplied by a generator having the following characteristics: tr or tf≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps, pulsewidth = 500 ± 10 ns. B. CL includes instrumentation and fixture capacitance within 0,06 m of the D.U.T. The measurement of VOC(PP) is made on test equipment with a -3 dB bandwidth of at least 300 MHz. Figure 8. 'LVDS105 Test Circuit and Definitions for the Driver Common-Mode Output Voltage A. All input pulses are supplied by a generator having the following characteristics: tr or tf≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps, pulsewidth = 10 ± 0.2 ns. B. CL includes instrumentation and fixture capacitance within 0,06 m of the D.U.T. Figure 9. 'LVDS105 Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal 9 |
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